CPU Virtualization / CPU state

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Hi,
I was wondering if someone can explain to me what CPU virtualization means  
from the perspective of inside of a CPU. I mean, If I have a single core ho
w I virtualized it?
What parts and functions of a CPU I have to know (registers, MMU) for achie
ving this CPU virtualization function? Is there any "general" programming c
ode that does this?

Also, I wil try to explain it as much better I can, I want to "play", under
stand and descover  the "state" of a CPU (state of registers), to be more s
pecific, of an ARM CPU (any model). Can somebody guide me how I can do this
? Do I have to buy a microcontroller?  

Many thanks!

Re: CPU Virtualization / CPU state
On Friday, October 13, 2017 at 12:51:01 AM UTC+2, Ilias Abrams wrote:
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s from the perspective of inside of a CPU. I mean, If I have a single core  
how I virtualized it?
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ieving this CPU virtualization function? Is there any "general" programming
 code that does this?
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erstand and descover  the "state" of a CPU (state of registers), to be more
 specific, of an ARM CPU (any model). Can somebody guide me how I can do th
is? Do I have to buy a microcontroller?  
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start googleing:
"cpu virtualization"
"cpu emulation"
"cpu simulation"

there's a lot of ARM simulators around (also which ARM core you want to pla
y with? there's a lot of them), find one with google.

Bye Jack

Re: CPU Virtualization / CPU state

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Hi Jack,  
thanks for your short reply, sorry If I bothered you but,  
You mean that If I google those thing I will find details about the process not in theory but specific the code?
So you know the answer of my question but you are so lazy to explain me  
and the only thing that you can say is "google" it?  

Ok then, Google it is!!!  
Thanks, nice chat!

Re: CPU Virtualization / CPU state
On Fri, 13 Oct 2017 03:51:14 -0700 (PDT), Ilias Abrams

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Virtualization is incredibly complicated - a whole graduate level
college course.  If you were to pay for it,  it would cost you
thousands of US dollars.

It isn't personal.  No one is going to volunteer to teach you the
equivalent of a college course for no compensation.  There no doubt
are people who will be happy to answer specific questions about
specific issues with specific architectures, but no one will answer an
open-ended question like "how does this work?"

You are expected to do some homework on your own.

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George

Re: CPU Virtualization / CPU state
On Friday, October 13, 2017 at 12:51:19 PM UTC+2, Ilias Abrams wrote:

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only when I know for sure (because I checked) that the answer to a question is easly found with google (in less than 5 minutes).

I know that it would be easier to give directly the link with the answer, but in general I prefer to teach someone how to fish intead of give him a single fish...

Bye Jack

Re: CPU Virtualization / CPU state
On 17-10-13 01:50 , Ilias Abrams wrote:
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I suggest to start by learning about "hypervisors", from  
https://en.wikipedia.org/wiki/Hypervisor .

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Use an assembly-language routine; assembly language lets you read or  
write any (architectural) register.

--  
Niklas Holsti
Tidorum Ltd
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Re: CPU Virtualization / CPU state
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I'm less familiar with the ARM side, but in Intel-land there's a pointer to
a structure in memory called the Virtual Machine Control Structure (VMCS).  
The VMCS is opaque (they don't publish the format) but it contains all the
state of a virtual machine (CPU register, architectural register state,
pointer to the page tables, etc).  When the machine switches from one VM to
another, the CPU saves the state of the VM in one VMCS and the VMCS pointer
now points to a new VM.

Another aspect is the Extended Page Tables.  A normal machine MMU has a
mapping from Virtual Addresses to Physical Addresses, described by a page
table.  When a VM is running, the physical addresses don't relate to real
physical memory any more.  We rename them Guest Virtual Addresses and Guest
Physical Addresses.  The Extended Page Tables are now another page table
that converts Guest Physical Addresses to Host Physical Addresses which
refer to actual DRAM.

In general, for machines without hardware virtualisation support, there is a
slow path available to emulate anything you need to virtualise: simply map
the memory as non-read/write, and let the hypervisor fix up whatever
behaviour is needed in the exception handler.  This is slow and painful,
which is why hardware virt support is now common.

However, many simulators/emulators don't have proper emulation of the
hardware virtualisation support (or maybe they have it, but it doesn't
completely work), so you might have to tread carefully.

In ARM-land, I don't think any microcontrollers have hardware virt - it's
only in ARMv7-A (it used to be optional; I'm not sure if it still is).  So
you'll need an A-class processor.  I know hardware virt was broken on the
Raspberry Pi 2 (Cortex A7 version) because they didn't use ARM's PIC with
virtualisation support- I'm not sure if anything changed on the Cortex A53
version (Pi 3 and later Pi 2).  For a simulator  I would probably start by
looking at Gem5 since ARM do a lot of work on that, but am not clear on the
current status.

Theo

Re: CPU Virtualization / CPU state

Thanks a lot both of you Theo and George,
the thing is that I have read about the hypervisors and the virtualization  
extensions that Intel VT provides and offer, also the hardware-assisted vir
tualisation that ARM have introduced after the ARMv7 and most recent ARMv8  
-A models but my problem is that, I am trying to understand more in depth t
he source code of an x86 hypervisor and of an ARM hypervisor about the CPU  
virtualization  
And I was wondering, how they start and writing this kind of source code?
  
I mean how they learn that you need for example "on x86 Intel to enable VMC
S that keeps the CPU state of both host and guest" ?

My problem focused on the implementation of this CPU virtualization theory  
in parallel with the source code of a hypervisor.

Any way, thanks a lot I know that I have to do my own homework just  
I was wondering if somebody can guide me more specific and not just  
google it :P  
Of course I have done that and still do that

Take care

Re: CPU Virtualization / CPU state
On 10/13/17 21:11, Ilias Abrams wrote:
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Depends on a lot of things. Virtualisation technology is pretty
high level and to understand it, you need a working knowledge of
operating systems, network theory and hardware technologies. You
can't expect to understand the detail without the background.
A general overview is not difficult, but the devil is in the
detail, as usual.

OS theory is in itself very interesting and accessable, even
for those with limited programming and systems engineering
experience.

Don't be put off, just keep at it :-)...

Regards,

Chris

Re: CPU Virtualization / CPU state
On Fri, 13 Oct 2017 14:11:48 -0700 (PDT), Ilias Abrams

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That's a more specific question. <grin>

You might want to take a look at Bochs (http://bochs.sourceforge.net/)
and/or at QEMU (https://www.qemu.org /).

Both of these are open source chip/system emulators.   Bochs is x86
specific, whereas QEMU also does ARM, MIPS, PowerPC and Sparc to
varying degrees.

I think Bochs may be farther along in its support for supervisory mode
code ... where a hypervisor lives ... by virtue of concentrating on
x86 only.  QEMU is focused more on running user mode applications -
the last time I looked at it, none of the fully emulated chips were
ones that had support for virtualization in hardware.

George

Re: CPU Virtualization / CPU state
On Fri, 13 Oct 2017 14:11:48 -0700 (PDT), Ilias Abrams

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The Intel x86 manuals do a pretty good job documenting what's required
to do (their flavor of) virtualization on x86.  It's not the easiest
read, but it is rather complete.  It does severely lack a high level
overview, though, it assumes you know what virtualization is.

A useful overview paper for x86:

https://www.vmware.com/pdf/asplos235_adams.pdf


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