ANN: Pulsonix Version 2.1 released

Do you have a question? Post it now! No Registration Necessary

Translate This Thread From English to

Threaded View
Version 2.1 of the excellent Pulsonix PCB design package has just been
released:

http://www.pulsonix.com

I've been helping to beta-test it for a couple of months. I t has lots
of interesting new features including:

CADSoft Eagle import
Associated parts
Enhanced report generator
Insulated wires
Component height checking
etc.

The downloadable demo has a 100 pin limit, but is otherwise fully
functional.

Prices start at $1395 for 1000 pins. Full price information is available
on the web site.

Leon


Re: Pulsonix Version 2.1 released

Quoted text here. Click to load it

Hi Leon,

I downloaded it and had a look at the routing demo file which has a large
number of amazing vias 0.015" diameter with 0.010" holes (same pad size on
all layers I think). It may be that I only use cheapo board manufacturers
but I don't think I know any one who would undertake to fabricate a
multilayer board with those rules.

So I looked in the demo to see how to modify the via -  and it seems that
you have to graphically edit all the layers together or each one
individually. Please tell me I'm wrong and that I missed the text based pad
stack editor. I use Edwin 32 (pretty old version from 2000 ish) and it has a
text based editor which is pretty much essential if you want to check
quickly that a via outer layers are one diameter and the inner layers a
different one.

I quite fancied Pulsonix till now but I can't see myself forking out this
kind of money if it does not easily support basic design requirements. I had
been hoping for parametric pad definer where you spec the basic outer layer
sizes and the expansion/contraction of the other layers as a % of that (like
Protel99 I think).

Is it me being picky (or dense) ?



Michael Kellett



Re: Pulsonix Version 2.1 released


Quoted text here. Click to load it

Is that routingdemo7? Vias smaller than that are routine these days.
Laser-drilled microvias go down to 5 mils or less, IIRC. Expensive, though.

Quoted text here. Click to load it

You can alter the vias globally in a design in the Technology dialogue:

Setup>Technology>Pad Styles

Select the pad you want to change in the table and click on Edit.

The report generator gives a text report on which via sizes are used, by
layer.

Quoted text here. Click to load it


You can have different pad sizes on different layers with Pulsonix
(there is a button on the dialogue box I mentioned above to change them
by layer), but I don't think that many of the mid-range packages do a %
change automatically.


Leon


Re: Pulsonix Version 2.1 released

Quoted text here. Click to load it


No they are not. A quote from PCB-POOL (which could be considered a routine
PCB supplier)

"Thanks for your interest in the PCB-POOL(R)!
In Our Prototype service the smallest drill size we accept is 0.3mm (12mil)
with a smallest pad of 0.6mm (24mil)for Multi layers.
There is no maximum drill size."

So the smallest they accept is 60% larger with twice the annulus of that
used on the routing demo file (never mind your claim of even smaller being
routine).



Re: Pulsonix Version 2.1 released

Quoted text here. Click to load it
large
on
manufacturers
though.
that
pad
has a
this
had
layer
(like
Quoted text here. Click to load it

Hello Leon,

Thanks for your reply - I checked out the method you suggest and it does
work.

To return to the more general issue of pad/hole sizes - 10 thou holes are
often produced with a 12 or bigger drill - not too hard or special. On the
example file it's the pad diameter that is crazy. With only 2.5 thou around
the hole you are in effect asking for 2.5 thou track width and inter layer
registration of better than 0.5 thou - possible but VERY expensive.
The example file doesn't really need those tiny vias.

If you want to show off the quality of the layout tools it would be much
more impressive to use a cheap via - 26 thou diameter and 10 thou hole which
would probably half the cost of a 4 layer board in reasonable (200 batch)
quantities.

Michael Kellett



Re: Pulsonix Version 2.1 released


Quoted text here. Click to load it

I think they were just showing off with that example. The other examples
use much more relaxed design rules. HDI (high-density interconnect) is
getting popular - that uses incredibly thin tracks and very small
micro-vias.

I often make my own single-sided PCBs at home and usually use 15 mil
tracks with 60 mil pads. I'm working on a 4-layer board that uses 8 mil
tracks and 40 mil dia. vias - that is routine for most low-cost PCB
prototype suppliers like PCB-Pool.

IMHO Pulsonix is easily the best of the mid-range packages like Orcad
and Protel.

Leon


Re: Pulsonix Version 2.1 released

Quoted text here. Click to load it

No gold plating, maximum 4 layers, 6 thou design rules, FR4 only, only
one copper weight, only one board thickness... no, they are a specialist
in easily made PCBs.. which is why they are cheap and good for prototypes.

Paul Burke



Re: Pulsonix Version 2.1 released

Quoted text here. Click to load it



Not much good for prototypes when designs *routinely* exceed their
capabilites.



Site Timeline