Highly Linear ADC Driver Amplifier - need suggestions

I'm currently researching the amplifier options for the output stage of a R F receiver I'm designing. This stage will have a single-ended output and wi ll drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linea r amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-perfor mance ADCs. I would prefer something simple, like a gain block that would r educe my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

Thanks,

Darol Klawetter

Reply to
Darol Klawetter
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AD603?

formatting link

Then you can set the gain via a control voltage. These things are very good, I used them in ultrasound systems where signal integrity is very critical. Unfortunately they have become a bit expensive for my taste so I haven't used one in new designs in a while.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

Use a balun into the ADC. MiniCircuits has 'em, possibly even at that low a frequency range. If not, wind your own or have it wound.

--
My liberal friends think I'm a conservative kook. 
My conservative friends think I'm a liberal kook. 
Why am I not happy that they have found common ground? 

Tim Wescott, Communications, Control, Circuits & Software 
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Reply to
Tim Wescott

receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-performance ADCs. I would prefer something simple, like a gain block that would reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

Most fast ADCs are differential-in, and have best linearity when driven differential. So one of the diff gadgets would be best.

ADA4960-1 is outrageous. It could do se-to-diff if you need that.

For single-ended, use a fast opamp like AD8009 or something. MMICS like ERA5 actually work well at low frequencies, single-ended or with maybe a balun as suggested.

30 dB at 50 MHz is a lot of GBW for a single stage.
--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

RF receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly lin ear amplifier to prevent washing out my ADC performance, but I don't want t o use one with differential I/O, which is typically used to drive high-perf ormance ADCs. I would prefer something simple, like a gain block that would reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz , which is too low for most RF gain blocks' optimal frequency range. My goa l is to drive 2.5 vpp, while preventing distortion that kills the SFDR of m y ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

Thanks for the suggestions. My ADC card (which is separate from my RF recei ver card) already has a balun that is used to drive the diff input of the A DC from a single-ended SMA input. I want to drive this single ended input w ithout having to use a diff output driver into another balun. I'll do it if necessary to get the performance I need, but I'm trying keep my parts coun t down on receiver's output stage.

Joerg, the AD603 has 60 dBc harmonic distortion.

Reply to
Darol Klawetter

receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-performance ADCs. I would prefer something simple, like a gain block that would reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

card) already has a balun that is used to drive the diff input of the ADC from a single-ended SMA input. I want to drive this single ended input without having to use a diff output driver into another balun. I'll do it if necessary to get the performance I need, but I'm trying keep my parts count down on receiver's output stage.

It seems to me that you're looking for a high dynamic-range HF front end amplifier. Whole volumes have been written about the subject. You should start with the ARRL Handbook and follow the leads (if you have not done so).

I strongly suspect that you need to go to a discrete component design. The power levels needed to handle most of the HF range will be much for integrated designs.

--

Tauno Voipio
Reply to
Tauno Voipio

No, I'm just looking for an acceptable single-ended driver for my IF output stage.

Reply to
Darol Klawetter

receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-performance ADCs. I would prefer something simple, like a gain block that would reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

receiver card) already has a balun that is used to drive the diff input of the ADC from a single-ended SMA input. I want to drive this single ended input without having to use a diff output driver into another balun. I'll do it if necessary to get the performance I need, but I'm trying keep my parts count down on receiver's output stage.

There are lots of opamps that would work.

--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

of a RF receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't wa nt to use one with differential I/O, which is typically used to drive high- performance ADCs. I would prefer something simple, like a gain block that w ould reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

receiver card) already has a balun that is used to drive the diff input of the ADC from a single-ended SMA input. I want to drive this single ended in put without having to use a diff output driver into another balun. I'll do it if necessary to get the performance I need, but I'm trying keep my parts count down on receiver's output stage.

Hmmm...maybe so, but I haven't found one with distortion products that are lower than my ADC noise floor. Can I live with that? Probably, but I would prefer to use an amp that doesn't degrade my ADC performance.

Darol Klawetter

Reply to
Darol Klawetter

a RF receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-performance ADCs. I would prefer something simple, like a gain block that would reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

Read the thread. Listen up, the high performance ADCs use differential for good reasons. Quit goofing around and go fully differential and dump the baluns. 100 dB is one heck of a range (about 26 bits), so whatever the converter cost figure on at least 20% of that for the input amplifier, maybe even over 300% as much. If it is differential input then give it what it wants and is designed for. Then use really good layout or you will waste all that capability.

?-)

Reply to
josephkk

a RF receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly li near amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-per formance ADCs. I would prefer something simple, like a gain block that woul d reduce my parts count. The frequency range of my output is 2 MHz to 50 MH z, which is too low for most RF gain blocks' optimal frequency range. My go al is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

mp

,
l
26 bits?, why not more like 18 bits?
Reply to
Robert Macy

of a RF receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-performance ADCs. I would prefer something simple, like a gain block that would reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

differential

dump

whatever

amplifier,

will

100 dB SFDR. Linear at well better than 1 part in 10^5 in voltage, including noise contribution. Then again 1 part in 10^6 is only 20 bits, but spur free dynamic range at some given sample rate needs some bits of excess to average out the inaccuracies. Maybe only 20 bits, but at well over 100 MS/s what ADCs do you know of that are really linear for that many bits. It usually takes 3 more bits minimum to control the quantitization noise to a worthwhile level.

?-)

Reply to
josephkk

of a RF receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't wa nt to use one with differential I/O, which is typically used to drive high- performance ADCs. I would prefer something simple, like a gain block that w ould reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

ial

dump

ver

ier,

will

s,

l

thank you for the explanation, didn't pay attention to that "SFDR" ignored it entirely. at least 20+3 is less than 26

It's just that I'm used to routinely using my 24 bit system out to 22 bits and almost all of that damage comes form the supporting electronics, didn't know at MS/s would need so much 'extra' overhead.

Reply to
Robert Macy

a RF receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly li near amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-per formance ADCs. I would prefer something simple, like a gain block that woul d reduce my parts count. The frequency range of my output is 2 MHz to 50 MH z, which is too low for most RF gain blocks' optimal frequency range. My go al is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

,
l

As I began researching my amp options, I did decide to go with a differenti al amplifier. I was hoping I could meet my goal using some single ended opt ions. Anyway, I'll be using a diff amp that was designed to drive my ADC, w hich is a LTC2217 from Linear Tech. I'll be using the LTC6401-26 diff amp.

About the 100 dB SFDR: For ADCs, this measurement is taken by capturing dat a at the max ADC clock rate and doing a frequency spectrum calculation (typ ically with a FFT). You will see that 100 dB SFDR can be attained with a 16

-bit ADC, even if the ENOB is less than 16-bits.

Darol Klawetter

Reply to
Darol Klawetter

receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-performance ADCs. I would prefer something simple, like a gain block that would reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

amplifier. I was hoping I could meet my goal using some single ended options. Anyway, I'll be using a diff amp that was designed to drive my ADC, which is a LTC2217 from Linear Tech. I'll be using the LTC6401-26 diff amp.

I used the LTC6402 and didn't like it. It tended to oscillate at high signal swings.

ADA4950-1 is spiffy. ADA4960-1 looks even better.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

Nice HF performance. They do spec the DC performance but it's pretty ugly- 50uV/°C typical.

Best regards, Spehro Pefhany

--
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Reply to
Spehro Pefhany

Just ignore the 0 Hz lines in the FFT.

(Does DC have I and Q components?)

--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

Yes, except for Q. ;)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

of a RF receiver I'm designing. This stage will have a single-ended output and will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't want to use one with differential I/O, which is typically used to drive high-performance ADCs. I would prefer something simple, like a gain block that would reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR of my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?

differential

dump

whatever

amplifier,

will

differential amplifier. I was hoping I could meet my goal using some single ended options. Anyway, I'll be using a diff amp that was designed to drive my ADC, which is a LTC2217 from Linear Tech. I'll be using the LTC6401-26 diff amp.

data at the max ADC clock rate and doing a frequency spectrum calculation (typically with a FFT). You will see that 100 dB SFDR can be attained with a 16-bit ADC, even if the ENOB is less than 16-bits.

And that is the other tradeoff. Your ENOB is likely no more than 12 maybe

13 bits with a 16 bit converter setup at max speed. Still sounds like a pretty cool design.

?-)

Reply to
josephkk

bits,

of

well

Actually i overreacted a bit. The situation is not really all that dire, you can trade off ENOB as well, and this is running at 100s of MHz. It starts getting difficult and fighting the components and their intended usage usually gets you much more trouble than it seems to save.

?-)

Reply to
josephkk

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