Breadboarded (using LM393s instead of discrete, a 555 for the sweep, and two followers and three diodes instead of the differential S&H shown) and is a very enjoyable circuit to putter around with, primarily because "it works", and not only that, it looks at relatively fast waveforms with relatively crappy output parameters (low bandwidth, merely X and Y channels needed). It's so cool to make something like a real 'scope uses, that fits on a breadboard no less.
FWIW, I got bandwidth up to 500kHz or so, using common transistors in the sampler and trigger circuits.
Actual use? Not really...you need more than enough bandwidth in the front end, which doesn't really outweigh using simpler high-bandwidth gain stages between the input and CRT plates, plus it isn't live. And the S&H (as shown) results in ugly capture transients, so it's not the prettiest output either. (That could be solved with a second, slower and nicer S&H operated in quadrature, of course.) Works well for ADCs, as everyone knows...
Tim
-- Deep Fryer: A very philosophical monk. Website @
I was going to say, What's with the 1N914/2N4403 "match" ?:-)
...Jim Thompson
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America: Land of the Free, Because of the Brave
A homebrew sampling oscilloscope would be an interesting project. Equivalent bandwidths in the low GHz would be feasible. HP and Tek were doing 4 GHz sampling scopes in the mid 1960's, with all discretes, tubes actually.
It does look strikingly similar to current mirror elements found in ICs, of course, "they" can do that, being the diode and transistor junctions can be reasonably identical, making a reasonable mirror.
I've found the 1N914/4148 and typical 2N4403's actually work particularly well. In a diffamp, coming-out-of-saturation characteristics are superior by a good microsecond or two compared to a 2.2k resistor in the same circuit.
Tim
-- Deep Fryer: A very philosophical monk. Website @
A comparator can sample a waveform, with slow bang-bang feedback. I first saw this in the 1964 GE transistor manual, as the "tunnel diode slideback sampler." A fast strobed comparator like the ADI device could make a GHz-range sampler with very few parts; use another comparator section as the fast ramp timebase sweeper thing.
Note that this sort of sampler inherently averages the waveform, but servoes on the median of the signal, not the true average, so noise behavior can be weird.
These days, commercial sampling scopes use dual-schottky-diode halfbridge samplers, true analog s/h circuits, to about 100 GHz bandwidth.
External trigger wouldn't be hard to do, either.
That's actually not hard to do. Just trigger a fast ramp into a comparator, a DAC output driving the other comparator input.
LeCroy did (and patented) a similar "heterodyne" type timebase. Its big limit is the inability to accept external triggers.
I breadboarded a simple dual-diode sampler with an SRD generating the sampling pulse, and a simple fast ramp with comparator as the fast delay sweep. It worked fine at about 70 ps risetime, 5 GHz bandwidth.
I have some of the HP 180-series stuff, including a number of the Grove samplers. And an actual mostly-tubes HP185, with plugins, circa
1962 or so.
There's so much surplus sampling gear around, it's not worth doing it yourself, except for fun. Lately I buy the Tek 11801-series stuff, very nice, very quantitative digital scopes.
I have been thinking that the ADCMP582 (fast latched comparator) would be an interesting device for this kind of thing. It will tell you whether the input waveform was above or below a specific value at a specific point in time, and if you connect a DAC to the other input of the comparator, and if the waveform is repetitive, then sooner or later you can figure out exactly what was the voltage at a certain time point on the waveform.
To generate the sampling pulses simply, I was thinking of adding the restriction that the waveform under test must be derived from stimulus genetrated by a crystal oscillator inside the sampling scope. This would be fine for doing TDR on cables and connectors, and evaluating the rise time of logic gates etc.
If two voltage controlled crystal oscillators (VCXOs) were locked to frequencies very close together (see * for how), then the edge from one oscillator would "walk through" the waveform from the other oscillator very slowly. This would eliminate the need for delay lines programmable with picosecond resolution. One VCXO would be squared up (maybe by an ADCMP582) and put out as the stimulus signal. The other VCXO would be squared up and used as the clock pulse for another ADCMP582 used to digitise the input waveform. The output of this comparator could control the Up/Down input of a binary counter (also clocked by the comparator sampling clock VCXO) and the counter binary output would in turn drive the DAC that provides the reference for the digitising comparator, to form a tracking ADC. If the input signal at the sampling point were to increase, the comparator would cause the counter and DAC values to increase until the DAC output voltage matches the input voltage to be sampled, at the sampling instant. Provided the sampling VCXO walks through the stimulus VCXO waveform slowly enough (the frequencies are similar enough), the up/down counter would be able to make the DAC track the input waveform, and so the DAC output voltage would be a greatly-slowed-down replica of the waveform to be sampled, (but slew rate limited to 1 DAC LSB per VCXO cycle at the DAC output).
To lock the two VCXOs to very nearly the same frequency, but whilst using wide bandwidth PLLs so that the close-in phase noise is good, the following circuit is suggested, using two fractional-N synth chips like the ADF4156.
As an example, two 26MHz VCXOs out of old GSM mobile phones could be used, as these are generally pretty high performance oscillators. The first VCXO is set to mid-range and is allowed to free-run. This is the VCXO used to produce the stimulus to the DUT. It goes to the reference input of the first ADF4156. The feedback input of the first ADF4156 gets its signal from the output of a microwave VCO, anywhere from 1.2 to 6GHz would do, e.g. 2.7GHz, out of an old GSM phone would do. The charge pump of this first ADF4156 would drive a loop filter which would drive the tuning input of the microwave VCO. So far, this is a conventional microwave synthesiser, and if the parameters of this first ADF4156 are set to int=K(e.g. 104), frac=K (e.g. 104), mod=1999, then it will produce
26000000*(104+104/1999)Hz (roughly 2.705GHz) at the output of the VCO.
The output of the microwave VCO is also connected to the feedback input of a second ADF4156, and the second VCXO (used as the sampling clock) is connected to the ref input of this second ADF4156. The charge pump of the second ADF4156 is connected to a loop filter which drives the tuning input of the second VCXO, with the charge pump set with appropriate polarity so that the second VCXO is locked to the microwave VCO. The parameters of the second ADF4156 would be set to int=K, frac=K, mod=2000, so that the second (sampling) VCXO would be equal to = fVCO / (104+104/2000) Hz = 26000000*(104+104/1999) / (104+104/2000) Hz = 26000000*208000/1999 / (208104/2000) Hz = 26000000*416000000 / 415999896 Hz = 26000006.5 Hz So using two wide-bandwidth PLLs, the oscillators can be locked 6.5Hz apart. This means that the sampling waveform will sweep through the stimulus waveform 6.5 times per second, with very low jitter. If the device being tested would work better with a stimulus lower than 26MHz, then the stimulus and sampling waveforms could be divided down.
If anyone has the time to build the above, I think it would be very interesting. A proper microwave PCB would be very helpful to get the best rise time perfomance. It might be feasible to see edges under 100ps, I think.
Failing that, I have an old HP8411A that has two nice "Grove samplers" in it, nominally 12.5GHz bandwidth. That cost only £40.
Yes, I did think about that - e.g. it would be no good for eye diagrams, jitter etc. and even a histogram is probably not possible but a cumulative histogram might be possible with different control logic.
Yes, the hard part as I saw it would be to generate the sampling pulse (assuming I can't get SRDs easily).
I thought that good jitter and also good linearity of the timebase might be harder to achieve with the ramp and comparator than by offsetting the frequencies of two crystal oscillators. Maybe the ramp and comparator thing is worth trying just to enable external trigger.
Good to know. I don't know where I can get SRDs easily other than gutting old HP samplers which sort of defeats the purpose. Also I see it as a challenge to avoid using hard-to-get parts, though those fast comparators might not be very widely distributed either I guess, I haven't tried yet.
Yes, it is for fun that I am interested in doing this -ideally to design something that can be replicated fairly easily without many fancy parts or lucky surplus finds. Since it is just for fun, I haven't actually had time to do any of it yet.
The M/A COM MA44769 is one of the few SRDs available in distributor stock, well under a dollar. Faster SRDs can be had from M-Pulse and Metelics, who are usually pretty good about samples. And 0.2 pF schottky diodes are not hard to come by.
The old HP and Tek manuals are a great source of theory and example circuits. I could post pics. Fast samplers are nonlinear and extract only a tiny shot of charge from the signal, a few per cent of the signal voltage, so have unusual charge processing and feedback loops. Interesting stuff.
And you can do this stuff on ordinary FR-4. The traces are all so short that pcb losses aren't bad.
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