Excuse my ignorance, but I'm still reading articles to figure out what Intel has to do w/ 'arm64' architecture.
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What is the relationship between ARM and Intel?
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This is a table of 64/32-bit ARMv8-A architecture cores comparing microarchitectures which implement the AArch64 instruction set and mandatory or optional extensions of it.
That's partly why there was a question mark in my unnecessarily snarky reply. I was only thinking of who should read a manual that might need a fork truck to lift were it on paper... and then give an answer... you, me... or...
In any case, I do regret being snarky... and to maybe make up for it... check out this link... where you'll find all sorts of ARM manuals.
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and download the "ARM Cortex-A72 MPCore Processor Technical Reference Manual" where it will say about 1/3 down page 1-15 that the Cortex-A72 Processor implements the ARM v8-A architecture, which includes... "Support for all Exception levels, EL0, EL1, EL2, EL3 in each Execution state."
There are several more manuals, including more for the A72, at this same link.
I Googled "arm a72 technical reference manual" and it was the first link shown.
On Sat, 16 Nov 2019 00:45:47 +0000, Jim H declaimed the following:
I suspect my "snark" and yours might cancel out... That, or reinforce as standing waves
While that answers part of the OPs query, it doesn't help for the optional features...
Such as the Cryptography Extension which has """ This book is written for system designers, system integrators, and programmers who are designing or programming a System-on-Chip (SoC) that uses the processor with the optional Cryptography Extension. """ and hence means one needs the documentation for the specific SoC -- which would, in this case, be a Broadcom document.
The processor core is just one part of the SoC. How large is the L2 cache? This document only mentions it could be 512kB, 1, 2, or 4MB -- and I'm sure that is a design decision when laying out the SoC, not some runtime boot parameter. Does the R-Pi4 have the ACP -- which is considered an optional interface. Where are the SPI/I2C/UART systems documented?
Heck -- you need an account just to obtain the ARM v8 architecture documentation...
Where is the equivalent to
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(which covers the Beaglebone Black chip set)?
--
Wulfraed Dennis Lee Bieber AF6VN
wlfraed@ix.netcom.com http://wlfraed.microdiversity.freeddns.org/
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