power management on embedded linux?

Does anyone have experience with power management on embedded linux systems? Is it mature and working? I specifically need my platform to do a hibernate where the system state is saved to a ram disk and then restored very quickly to wake up.

I know there are alot of issues with getting various devices to sleep and wake but I think we can handle that. I'm mostly interested in the kernel itself.

Any tips are appreciated.

Thanks, Clark

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cpope
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| Does anyone have experience with power management on embedded linux systems? | Is it mature and working? I specifically need my platform to do a hibernate | where the system state is saved to a ram disk and then restored very quickly | to wake up.

How is a ram disk going to help? Did you put the ram disk in a special part of ram that won't be powered down? Or did you mean something other than ram disk?

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| Phil Howard KA9WGN (ka9wgn.ham.org)  /  Do not send to the address below |
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phil-news-nospam

systems?

hibernate

quickly

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Yes, the sdram will remain powered. Everything else, including fpga, will be shutdown.

Reply to
cpope

|> | Does anyone have experience with power management on embedded linux | systems? |> | Is it mature and working? I specifically need my platform to do a | hibernate |> | where the system state is saved to a ram disk and then restored very | quickly |> | to wake up. |>

|> How is a ram disk going to help? Did you put the ram disk in a special |> part of ram that won't be powered down? Or did you mean something other |> than ram disk? |>

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| |---------------------------------------/----------------------------------| |> | Phil Howard KA9WGN (ka9wgn.ham.org) / Do not send to the address below | | |> | first name lower case at ipal.net / snipped-for-privacy@ipal.net | | |>

| |------------------------------------/-------------------------------------| | | | Yes, the sdram will remain powered. Everything else, including fpga, will be | shutdown.

Then I guess the ram would be a suitable place ... if there is enough of it to save the state with. You should be sure that a sufficient area is reserved. Making a ramdisk ahead of time would certainly be a way to do it. The rest of it, unfortunately, I don't have experience with (how to detect the power going down, save the state, detect power coming back on, and restore that state). Is the CPU itself powered down? If so, then it will have to go through some kind of startup sequence that would have to verify that a valid state is saved. Checksumming the saved state with an MD5 code would be a good idea if there is enough CPU time available to do that, or if the CPU itself does the power off final step.

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| Phil Howard KA9WGN (ka9wgn.ham.org)  /  Do not send to the address below |
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Reply to
ellis

Depending on the processor, it works. If you are talking about ARM processors, typically the SDRAM is put into self refresh, and the processor is put into a low power state with the system consuming a couple mA of current. On resume, you take the SDRAM out of self refresh, and them jump to where you left off in the kernel. The PXA270 has working suspend/resume support, so that may be a useful reference. What processor are you thinking of using?

Yes, the kernel can typically handle it. But, this often a lot of work to get the drivers to behave correctly, etc. The kernel does have a mechanism to register power management callback functions, etc.

Good luck. Cliff

==================== BEC Systems, LLC

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Reply to
Cliff Brake

systems?

hibernate

quickly

and

kernel

My platform is a PPC inside a xilinx fpga so when I shut the processor down I really shut it down. I'm expecting some trouble restoring the state of the PPC on wake up but its good to here that it works on some platforms so I'm not charting totally new water. -Clark

Reply to
cpope

The trick will be putting the SDRAM into self refresh during suspend, and then taking it out of self refresh without loosing any data. If you can do that, and determine when you are resuming or cold booting, it should be possible -- even if you have to boot through the reset vector.

Cliff

==================== BEC Systems, LLC

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Reply to
Cliff Brake

If the CPU dies, you need to reboot (using hibernation).

AFAIK, the PPC design does not support sleeping with 0Hz clock. Can't you let the CPU run in the minimum clock speed possible instead.

-Michael

Reply to
Michael Schnell

down

the

I'm

No, the plan is to turn off the power to the fpga because they have a large static power consumption. I think if I put a unique word in the upper location of sdram the bootloader can check to see if it is a cold or warm boot the next time the fpga is configured. Of course the whole scheme relies on the sdram entering/exiting self refresh reliably.. -Clark

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cpope

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