Hi,
For a filter implementation in FPGA/ASIC, there are two efficient architect ures for the MAC. One is distributed arithmetic, while the other is serial- parallel multiplication based. I know that DA normally is for one of the mu ltiplicant is constant. The serial-parallel mulication has no such requirem ent. When one of the multiplicant is constant, it can save some logic gates indeed. Both methods process one bit with one clock cycle. What the differ ences are for these two architectures?
Thanks.