What is role of place & route tools in synthesis in vhdl.& HOW THE AREA & time constrain are specifiesd in XIlinx or modelsim software?

hi all What is role of place & route tools in synthesis in vhdl.& HOW THE AREA & time constrain are specifiesd in XIlinx or modelsim software? Can LabVIEW be used for programming of ALTERA or XILINX boards or LabVIEW7 is meant for configuring the FPGA h/w of NATIONAL INSTRUMENTS only

-----BANSALdhan raj

Reply to
BANSAL DHAN RAJ
Loading thread data ...

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.