What is role of place & route tools in synthesis in vhdl.& HOW THE AREA & time constrain are specifiesd in XIlinx or modelsim software?

Oct 15, 2004 0 Replies

hi all What is role of place & route tools in synthesis in vhdl.& HOW THE AREA & time constrain are specifiesd in XIlinx or modelsim software? Can LabVIEW be used for programming of ALTERA or XILINX boards or LabVIEW7 is meant for configuring the FPGA h/w of NATIONAL INSTRUMENTS only



-----BANSALdhan raj


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