1. Home
  2. Field-Programmable Gate Arrays
  3. protocol layer

protocol layer

please tell me if any one know or have core of PL (protocol layer) in usb core. please tell me if any one know about PL (protocol layer)functionality and timing diagram in usb core free of bugs. If any one know links which provide core in verilog free of bugs please tell me. thanks

Reply to
hmmudassir82
Loading thread data ...

Please see Lorenz Kolb's reply to "free of bugs"

RB

Reply to
Rube Bumpkin

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.