protocol layer

please tell me if any one know or have core of PL (protocol layer) in usb core. please tell me if any one know about PL (protocol layer)functionality and timing diagram in usb core free of bugs. If any one know links which provide core in verilog free of bugs please tell me. thanks

Reply to
hmmudassir82
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Please see Lorenz Kolb's reply to "free of bugs"

RB

Reply to
Rube Bumpkin

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