Does anybody have experience/knowledge of the real consequences of powering up:
1) The 1.8V supply faster than 5ms 2) and after the 3.3V I/O has been powered. i.e. do they have to be ramped together? We have a board redesign in process and would like to get it right, but controlled ramping will expand the board size beyond our presently acceptable limits.You can read the answer on the Xilinx website in TechXclusives of Jan 2003: Here are the relevant line: Introduction
We receive many questions about I/O behavior under special circumstances, such as before and during configuration, after configuration if one Vcc is removed, or if the pin is pulled lower than ground or higher than Vcco.
The cases of interest are:
1.Powering up 2.Before and during configuration 3.Normal operation after configuration has been completed. 4.Losing Vcco The answer to these questions is made more complicated by the subtle differences between the following Virtex? and Spartan-II? sub-families: Virtex? and Spartan-II? Virtex-E? and Spartan-IIE? (with small differences for Virtex-E between 8-inch and 12-inch foundries) Virtex-II? and Virtex-II? ES Virtex-II Pro? and Virtex-II Pro? ESIn the very beginning (V, V-E, S-II, and S-IIE devices)
While power is first applied, all I/Os are put into a 3-state condition for any sequence of Vccint, and Vcco. There are no power-sequencing requirements. There is a special case only for Virtex-E devices that are marked with
0707 after the speed/temperature designation: On these Virtex-E devices the supply voltages should be sequenced such that Vccint comes up first. Vccint must have reached 90% of nominal before Vcco reaches 10% of nominal, or else the I/O pins may drive High, Low, or even both simultaneously (!). This unpredictable behavior cannot harm the device short-term, and it always ends as soon as Vccint has reached about 0.8 V.If this behavior is unacceptable, append 0773 to the order code. (Note that XCV1600-E and XCV2600-E aswell as XCV405-EM and XCV812-EM always come with the voltage sequencing requirement.)
and so on.....
Peter Alfke =============================
Ray wrote:
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