New keyword "if_2" for HDL is suggested for dealing with 2-write port memory

Hi,
In my opinion, using a 2-write port memory is a mature technique and its im
plementation in any chip is never a secret. Hardware designers in HDL often
use 2-write port memory in their applications.
To relieve hardware designers from repeatedly writing complex code for a 2-
write port memory, I suggest here for full HDL grammar spectrum to introduc
e a new keyword "if_2" and new "if_2" statement, specifying a new if statem
ent which has everything same as an if statement, but it specifies a second
write to an array. Here is a code example on how to introduce such stateme
nt:
p1: process(CLK) is
begin
if CLK'event and CLK = '1' then
if C1 then
An_Array(a)
Reply to
Weng Tianxiang
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implementation in any chip is never a secret. Hardware designers in HDL oft en use 2-write port memory in their applications.
2-write port memory, I suggest here for full HDL grammar spectrum to introd uce a new keyword "if_2" and new "if_2" statement, specifying a new if stat ement which has everything same as an if statement, but it specifies a seco nd write to an array. Here is a code example on how to introduce such state ment:
its full range, including all "else", "elsif" parts. And "if_2" keyword ca n only be used in a clocked process.
be written as:
ot having repeatedly to write a 2-write-port memory for different FPGA chip s.
Can you give an example of the code this would replace??? I don't remember two port memory code being all that complex.
--
  Rick C. 

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Reply to
Rick C
e:
s implementation in any chip is never a secret. Hardware designers in HDL o ften use 2-write port memory in their applications.
a 2-write port memory, I suggest here for full HDL grammar spectrum to intr oduce a new keyword "if_2" and new "if_2" statement, specifying a new if st atement which has everything same as an if statement, but it specifies a se cond write to an array. Here is a code example on how to introduce such sta tement:
in its full range, including all "else", "elsif" parts. And "if_2" keyword can only be used in a clocked process.
an be written as:
not having repeatedly to write a 2-write-port memory for different FPGA ch ips.
er two port memory code being all that complex.
For 2 writes on the same cycle to an array now you have to refer to a speci al library either from Xilink or Altera.
our code has to change if you move chip provider from one to another.
With introduction of "if_2" concept you never have to refer to any library, and it would become normal and simple as addition of A and B!
Here is a more example: p1: process(CLK) is begin if CLK'event and CLK = '1' then if C1 thenAn_Array(a)
Reply to
Weng Tianxiang
On Wednesday, September 25, 2019 at 11:16:40 PM UTC-4, Weng Tianxiang wrote :
ote:
its implementation in any chip is never a secret. Hardware designers in HDL often use 2-write port memory in their applications.
r a 2-write port memory, I suggest here for full HDL grammar spectrum to in troduce a new keyword "if_2" and new "if_2" statement, specifying a new if statement which has everything same as an if statement, but it specifies a second write to an array. Here is a code example on how to introduce such s tatement:
y in its full range, including all "else", "elsif" parts. And "if_2" keywor d can only be used in a clocked process.
can be written as:
t, not having repeatedly to write a 2-write-port memory for different FPGA chips.
mber two port memory code being all that complex.
cial library either from Xilink or Altera.
I would suggest you spend more time researching this. I had no trouble fin ding info on inferring dual write port RAMs with Xilinx tools.
formatting link
pdf (page 250)
your code has to change if you move chip provider from one to another.
y, and it would become normal and simple as addition of A and B!
h company.
I think you will find both a great deal of resistance since the general con struct of VHDL is not to provide specific features in the language to speci fy hardware, rather to describe behavior and let the tools infer appropriat e hardware corresponding to the target technology.
I would also point out your code is not appropriate for a dual port RAM sin ce the second port can only be written to when the first port is being writ ten to. Shouldn't they both be independent as was the case in your other e xamples in the other thread?
--
  Rick C. 

  + Get 2,000 miles of free Supercharging 
 Click to see the full signature
Reply to
Rick C
te:
d its implementation in any chip is never a secret. Hardware designers in H DL often use 2-write port memory in their applications.
for a 2-write port memory, I suggest here for full HDL grammar spectrum to introduce a new keyword "if_2" and new "if_2" statement, specifying a new i f statement which has everything same as an if statement, but it specifies a second write to an array. Here is a code example on how to introduce such statement:
ray in its full range, including all "else", "elsif" parts. And "if_2" keyw ord can only be used in a clocked process.
nt can be written as:
it, not having repeatedly to write a 2-write-port memory for different FPG A chips.
member two port memory code being all that complex.
pecial library either from Xilink or Altera.
inding info on inferring dual write port RAMs with Xilinx tools.
6.pdf (page 250)
ut your code has to change if you move chip provider from one to another.
ary, and it would become normal and simple as addition of A and B!
ich company.
onstruct of VHDL is not to provide specific features in the language to spe cify hardware, rather to describe behavior and let the tools infer appropri ate hardware corresponding to the target technology.
ince the second port can only be written to when the first port is being wr itten to. Shouldn't they both be independent as was the case in your other examples in the other thread?
Rick,
I just list a code snippet that suggests if statement and if_2 statement ca n be mixed, not a code error.
Weng
Reply to
Weng Tianxiang
On Wednesday, September 25, 2019 at 11:16:40 PM UTC-4, Weng Tianxiang wrote :
ote:
cial library either from Xilink or Altera.
That is incorrect. Since this is your premise for your new if_2 statement, and it is incorrect you should go back to rethinking the supposed problem.
your code has to change if you move chip provider from one to another.
No you don't.
Not only that, but the if statement can be used whenever the if_2 statement can be used, there is no need for if_2.
h company. No need to remember if_2 either. But don't worry, Google will remember.
Kevin Jennings
Reply to
KJ

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