Lattice "Open IP" license is GPL-compatible?

I'm working on a new project using some code from opencores for my thesis research. I'd love to use a nice, high-quality tiny-fsm like picoblaze or the lattice semi micro8. However, I'm worried about licensing issues, as I'd also like to be able to use the opencores IP and release the whole thing under the GPL. Does anyone know / have a strong opinion on whether or not the Lattice Open IP license allows the code to be incorporated into GPL'd designs? I pretty sure the PicoBlaze does not allow this, and pacoblaze isn't so useful for those of us in vhdl-land.

Thanks again, ..Eric

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IIRC, the picoblaze license says the core is free to use on Xilinx devices. Since Xilinx's picoblaze is built straight from instantiated primitives instead of portable HDL, Xilinx's picoblaze is completely useless on non-Xilinx devices. I have not looked at other vendors' PSMs but I suspect their licenses and possibly their code are both crafted along similar lines.

Since the picoblaze's license is self-enforced by design, my guess is that you would not have any problems using the picoblaze in a GPL'd project as long as you do not slap the GPL onto picoblaze sources or alter/remove the existing license.

I have contemplated writing my own plain VHDL picoblaze to add a few small features like a 16 entries stack and variable forward jump/call for a while now but then I'd have to put together my own compiler or be stuck having to massage the binaries between builds. (Well, I looked at pacoblaze's homepage and it seems like it already has some of the features I am interested in along with a java-based open-source compiler... maybe I'll translate that to VHDL and tweak the compiler to support my own extras and altered features.)

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Daniel S.

Also, the Mico8 is quite similar to PicoBlaze, so you could try modifying that lineage ?

Lattice have an assembler (opensource) - but last time I looked, it was pretty annoyingly basic, but Alfred Arnold added the Mico8 to his AS Assembler (open source), which is quite a lot better.


Reply to
Jim Granville

It is quite trivial to write small wrappers for modules like FDCE, LUT4, and SRL16E in portable VHDL or Verilog and then synthesize it with an ASIC flow.

Even if this wouldn't be possible you would still not be allowed to mix the designs [1] since the Xilinx only limitation is not compatible with the GPL requirement on no extra limitations on distribution.


[1] Well, it is not quite as clear cut as this. If you do this internally without distributing it outside of your organisation in a product or otherwise it should be ok. [2] [2] IANAL applies to this one...
Reply to
Andreas Ehliar

This is my understanding as well, and it's a real pain if you want to incorporate other chunks of GPL'd code (of which there are many). This frequently results in me having to, for example, reimplement xilinx app notes from the pdf alone and not touch the code, just so I can then use the result.

I understand why xilinx would want to prevent someone from turning picoblaze into an asic, or being used by competing fpga vendors. But if the design really is optimized for xilinx primitives, then that shouldn't be that possible without a lot of work. :) And one of the benefits of FPGAs as a platform is you can potentially switch vendors (although with as often as I directly instantiate things like DCMs and BlockRAMs, that's easier said than done).


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