I just found the Serial Flash Loader (SFL) which allows you to program an Active Serial (AS) part (EPCSx) using the JTAG port, sparing you the need for a dedicated serial config header.
According to AN370:
this is made possible by a megawizard function which can be in your design or a stub design which is loaded expressly for doing the update. The programming tool in Quartus recognizes the "JIC" files and selects a "factory default SFL image" to accomplish the loading. There are two rows and thus two "program" checkboxes, and I assumed you could simply un-check the FPGA part if you included SFL in your design, but the boxes are locked together.
What is the trick for using the SFL embedded in your design instead of "factory default SFL image"?