The starting point here is a chip with RISC-V cores and a maker who wanted a just-in-time translator that could be useful beyond one device. MKDV ported the gpSP GBA emulator to the ESP32-P4 and wrote a fresh RISC-V JIT backend for it, and the result is a handheld running GBA titles from an SD card on an OSPTEK P4C5 board with a 4.3-inch 800x480 touchscreen. The chip itself retails for around five dollars, which makes the whole thing feel almost unreasonable.
The JIT translates ARM and Thumb blocks into RV32 code, and compressed RVC/Zcb instructions keep the generated code small. That matters because the JIT executes from PSRAM, and doubling the L2 cache from 128 to 256 KiB helped more than manually moving hot arrays into internal SRAM. The workload is split across cores: all emulation, including rendering at original resolution, sits on CPU0, while CPU1 handles scaling and display effects. The maker figures this split hints GBA might be doable on lower-clocked RISC-V chips too.
What stands out is the attention to real bottlenecks. Self-modifying code in games like Doom II was the big headache, so instead of flushing the whole code cache on RAM code changes, the JIT now invalidates just the affected blocks and reuses old translations when the original bytes return. Register allocation was the harder fight, since both guests have 32 general-purpose registers and the mapping needs dynamic spilling. Display options are solid as well: 3x nearest, bilinear and LCD grid, plus color modes from unadjusted output to one approximating the original GBA LCD.
The open end: PS1 work is ongoing, with lighter games running well and heavier 3D titles playable at full speed with slight automatic frameskip, but that code has not landed on GitHub yet.
Project by MKDV. Watch it on their YouTube channel: