USART Interrupts on the AT9140008

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I'm trying to get the ENDTX interrupt working after doing a transfer
from the PDC. I can verify that the bytes in the Transfer Pointer
Buffer are being sent out the UART, but my interrupt handler for the
ENDTX interrupt (which should fire when the Transfer Count reaches 0)
never gets fired.

Debugging the processor yields that I do have a pending USART0
interrupt, but the NIRQ line never seems to get asserted.

I have defined my interrupt vector table with the following entry at
ldr pc, [pc, #-0xF20]
(Which moves the PC to the value stored in the AIC_IVR

I am using the GNU tools, so my interrupt handler is defined as:
void usart0_int(void) __attribute__ ((interrupt ("IRQ")));

I have made sure that I am setting the correct pointer to the
interrupt handler and enabling the interrupt (I have verified all this
through the debugger), and that IRQs are enabled in the CPSR.
Is there anything else I have to do?

Unfortunately I cannot post specific code at the moment since I am
posting this from home, but I will be able to do that monday.

James Lamanna

Re: USART Interrupts on the AT9140008
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Yup, I'm pretty sure I'm setting the AIC_IMR and the US_IMR.
And at the end of my interupt handler I write to AIC_EOICR.
But it doesn't look like the interrupt handler is even being called once.

Re: USART Interrupts on the AT9140008

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Would you mind posting a minimal example code?

If you'd rather like to email, change the address in my sig in the obvious
way. Sorry for the mess for misleading spambots.

Tauno Voipio
tauno voipio @ iki fi

Re: USART Interrupts on the AT9140008
I also think I've noticed another problem with gcc-3.2
If i declare an empty interrupt handler, it generates the following code:
    @ Interrupt Service Routine.
    @ args = 0, pretend = 0, frame = 0
    @ frame_needed = 1, uses_anonymous_args = 0
    str ip, [sp, #-4]!
    mov ip, sp
    sub lr, lr, #4
    stmfd   sp!, {fp, ip, lr, pc}
    sub fp, ip, #4
    ldmea   fp, {fp, ip, pc}^

Now shouldn't there be a:
subs pc, lr, #4
at the end?

Re: USART Interrupts on the AT9140008
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The sub #4 is done just before the lr is stored on the stack and the
result is popped directly in the pc at the end, seems OK.


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