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reason for difference in MIPS between simulator and Board

Dear Friends, I am porting eAAC decoder in ARM926EJ-S (ARM9E core) The MIPS measurement in simulator and onboard are not same. MIPS onboard is higher than in simulator(4 to 6 MIPS) can anyone tell me what's the reason behind this? MIPS are measured onboard with cache disabled(at this point,will b enabled later)

The reason i think of:

1.Stack/heap/bss section/state variables are not getting fitted i internal memory

2.because of page fault?if so how can i avoid it?(ARM926EJ-S has MMU)

3.Is there any way to modify the linker file for ARM,i feel stack/heap/bs section is not getting fitted in internal mem

Finally, will there be any difference in MIPS, when the project is built in debu and release mode?

Reply to
swami.kmb
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Op Thu, 24 Jul 2008 08:09:14 -0600 schreef swami.kmb :

Because a simulator simulates an entire processor on another processor. The clocks are probably not the same, and maybe the simulator clock isn't even constant.

Is there a difference between the internal memories?

There should be a way to detect and log page faults.

Use a text editor.

That depends on the differences between debug and release mode.

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Reply to
Boudewijn Dijkstra

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