RE: AT91SAM7: C-startup

You can use the relative addressing if all of your interrupt handlers fit

> in > the first 32K of code (14 bit address range). Some folks have a first > level > handler in that space that dispatches to other relocatable code outside of > that range.

I see, it's a bit clearer now. And what about this snippet from the Atmel's appnote "Getting started with at91sam7 controllers": .... reset_vector: ldr pc, =reset_handler undef_vector: b undef_vector /* Undefined Instruction */ swi_vector: b swi_vector /* Software Interrupt */ ....

They put the vectors table and IRQ handler in the seperate section named .vectors, while "reset_handler" in .text. Is that why they load absolute address of 'reset_handler' in to PC ? By the way, I checked it disassembles in to "ldr pc, [pc, #NUM]", so it would be equivalently to write "ldr pc, [pc, #reset_handler]", is that right ?

The second method allows you to put full 32 bit addresses in the table > (which usually immediately follows the vectors). Normally you boot from > flash and then set up RAM and do a remap to put the RAM version of the > vector table at 0. Once that is done you can modify the jump table to > install handlers.

Best regards, Roman Mashak

Reply to
Roman Mashak
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No - #NUM is the distance from the instruction (or actually where pc points at the instruction execution time) to a fullword in the .vectors segment. The fullword contains the absolute address of the startup routine.

To have the constant at an accessible place, you'll need a .pool directive in the .vectors segment.

A plain branch (b target) will have a better reach than a ldr pc,#target. See the instruction set description for details.

The assembler translates a literal addressing (=dataitem) to either an immediate load (ldr reg,#dataitem) or to a reference to a literal pool accessible via pc-relative addressing. The selection is based on the data item value and whether it is known at assembly time.

The first method is not very far from the second one. If you do not create exceptions during the initialization, you do not need any other vectors than the reset vector.

--

Tauno Voipio
tauno voipio (at) iki fi
Reply to
Tauno Voipio

Hello,

Actually this word is located in the .text section, while .vectors contains IRQ/FIQ handlers only: ... .section .vectors .arm

reset_vector: ldr pc, =reset_handler undef_vector: b undef_vector /* Undefined Instruction */ swi_vector: b swi_vector /* Software Interrupt */ ... .section .text reset_handler: ldr pc, =lowlevel_init ...

Does it mean that all the .word directives are embedded in the current section I declared .pool in ?

Then what's the difference? "ldr pc, ", where label_name contains a word with address to a handler, also results in "ldr pc, [pc, #num]". However it's not limited with

32-bit space as 'B' instruction is.

Do you mean if I don't need to handle exceptions during the initalization, then I don't need the full-blown vector table?

Best regards, Roman Mashak

Reply to
Roman Mashak

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