Problem disabling cache on ARM926ej-s

I've been using mmu.c to setup my MMU table and enable the caches - for months now, so I think that part is OK.

Now I need to disable the icache, dcache and mmu, do some stuff and re-enable them.

But when I disable the cache, the prog starts to behave like it has a will of its own.

If I don't disable the cache, then it works normally.

Please take a look...

// creates a mmu level 1 table with flat address space.

#define not_cacheable (1 20) #define SDRAMend ((AT91C_EBI_SDRAM + SDRAMsize) >> 20)

static void mmu (void) { uint f; uint *pSDRAM = (uint*) AT91C_EBI_SDRAM;

// create table // setup all linear addresses, AP(3), domain(0), bit 4(1) // as non-cacheable and as invalid entry for (f = 0; f

I've copied (almost) this from linux, and it still doesn't work.

disablecache: mrc p15, 0, r15, c7, c14, 3 @ test, clean and invalidate bne DisableCache

mov r0,#0 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache mcr p15, 0, r0, c7, c10, 4 @ drain write buffer

mrc p15, 0, r0, c1, c0, 0 @ Disable Icache(12), Dcache(2) and MMU(0) bic r0, r0, #4096 bic r0, r0, #5 mcr p15, 0, r0, c1, c0, 0

mov pc,lr

Can anyone see a problem here?

Got it!

"bne DisableCache" should be "bne disablecache"