It's not clear to me why this needs to be resolved by the BIOS.
First, the fact that the card is placed at a high memory address is unrelated to caching. The BIOS putting things at high addresses is convient to avoid things at low addresses (such as the 2G of RAM you might have). But that doesn't make the area unworthy of caching.
Second, what kind of device would sit on the PCI bus that is simple enough to not need a device driver and yet requires caching to be turned off for that area?
The only bits in the PCI configuration space that go with the request for a range of memory are: prefetchable, type (2 bits identifying where it can be placed) and a memory versus I/O flag. That's all the BIOS has to work with.
Why would a device on the PCI bus not want to have its memory range cached? Because the memory can change by means other then the system CPU. For example, our cards have serial chips which have their internal registers mapped to PCI memory space. If the CPU writes to one of these, it can't be cached -- it needs to go right through to the memory/register immediately. Likewise, the CPU can't refer to its cache to get a value. The registers change all the time based on what's going on on the serial line. So any cache would instantaneously be "dirty".
The above card would be useless without a device driver. What kind of situation are you worried about needing to have the PCI device's memory range uncached that is simple enough to not need a device driver?
Steve
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