mixing C and assembly

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Most people simply admit that inability to read something largely inhibits the ability to criticize it. :-)

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** Posted from http://www.teranews.com **

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(above diddled to reduce vertical space, shouldn't affect meaning) (If it does that is a serious effect)

OK. But you should be aware that opening the receiver to accept html mail allows all sorts of evil monsters to sneak in on many systems. Text is safe.

Now this shows the fall-thru. Yet, as far as I can see, the C source has no way to control it. A foo call here exercises foobar, and a bar call is independant. I am not doubting that you can do it - I just don't see how you can control it. Are you making some sort of extra requirement for prototypes? Are you doing some sort of possible path analysis? What if we put foo, bar, and foobar in one c file, and main in another? For example:

void bar(void) {NOP();) void foo(void) {NOP();} void foobar(void) {NOP(); bar();}

maybe with some extrn definitions. No prototypes needed for the file, only for linkage. The generated code can be:

void foobar (void) {

0100 9D NOP NOP(); bar(); } void bar (void) { 0101 9D NOP NOP(); 0102 81 RTS } void foo (void) { 0103 9D NOP NOP(); 0104 81 RTS }

and the loader can drop the code for foo, because it is never called. However there are differences in source order for C compatibility and for _easy_ fall-thru detection. Note that source and object are in different order.

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I would guess that path analysis is possible---unless you have functions called with function pointers. My recollection of

8051 C compilers from the 90's is that they did a lot of analyis to allow variable overlays. Call path analysis seems of comparable complexity.

A decade or so back, I used the Keil 8051 C compiler on a project for one of the smaller variants. I had done earlier projects with assembler, but I wanted to take advantage of the compiler overlay capability to maximize variable space and to take advantage of some of the math library routines. IIRC, the CPU had only 2K flash (89C2051).

At that time, IIRC, it was pretty much a "burn and learn" process as I didn't have a JTAG debugger comparable to the systems I use (and enjoy) for the MSP430 today.

Mark Borgerson

Now I do worry... "burn and .Learn"? The Keil system has one of the best simulators for 8051 there is.

For the 8051 family there are only a couple of oddballs with the Jtag debugger on them. Professionals would use an Emulator. They were not expensive and gave full vision and control of the MCU.

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[...]

But surely the C compiler has the freedom to emit the same code as the assembly programmer did? I don't know if any compiler would do it, but if this was a frequent enough case to optimize, it does not seem too hard to do.

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Pertti

There is no need to control it. C is a way to describe the problem and compiler is responsible for code generation.

As a program evolves the compiler/linker on each build have an opportunity to start over and create new code based on the requirements embodied in the source.

w..

Apparently you don't know the first thing about compiler optimisation. This trick is called tail optimisation and is a standard technique, with all respect to Walter Banks, who implemented this technique neatly. See also

I'm a good assembler programmer myself, and I don't find Banks claim extravagant, though a little provocative.

Groetjes Albert

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Going from the first to the second is a standard optimisation technique called strength reduction (with regard to an address calculation).

A good compiler knows that those are equivalent and do the picking for you.

That is a good advice. You can learn something. However ... Did you look at some Itanium code or SEAforth code lately? Did you learn something or did you awake with a headache?

Groetjes Albert

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Albert van der Horst, UTRECHT,THE NETHERLANDS
Economic growth -- like all pyramid schemes -- ultimately falters.
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True. One doesn't always have the pleasure of using a good compiler. :)

Can't say that I have.

What I'm usually looking at are pretty standard CISC micros like the H8 or MSP430, or vanilla RISC CPUs like the ARM or NIOS2.

Never had a chance to embed an Itanium in anything.

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I was once involved in a prototype for a very large power supply. Because of its odd design, it had a high minimum output current, so in idle we had to burn off about 800W. We used a panel oven, but an embedded Itanium would have given a more compact solution.

The worlds first power supply that runs protien folding simulations while idle...

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"Protein folding" - that's like cooking a steak on top of the box?