While the PDP-11 was little endian, the 32 bit operand for MUL, DIV and ASHC instructions had the most significant part in R0 (or R2 or R4) and the least significant 16 bit value in R1 (or R3 or R5), so in a sense the "wrong" way around. However, no 32 move instructions existed, so you had to move R0 and R1 with two separate MOV instructions from/to memory, so it was up to the compiler or assembler programmer into which order the registers were loaded in memory.
However, the PDP-11/VAX floating point format looks strange in memory. The first 16 bit word contained the sign, exponent and the most significant part of mantissa and the following word(s) contained the less significant part(s) of the mantissa. In the first 16 bit word, the sign was at the leftmost portion, followed by the 8 bit exponent and 7 bit of the mantissa at the right end.
When storing a 32 bit float in memory and viewing it by sequential byte addresses, the first byte contained the last bit of exponent, the
7 most significant part of mantissa. The second byte contained the sign and 7 most significant part of exponent. The third byte contained the least significant bits of the mantissa and the 4th byte the middle bits from the mantissa.Paul