Endianness does not apply to byte

Little-endian can be a bit simpler for the hardware design and/or compiler since the address you put on the bus when you read a variable doesn't change depending on the destination type.

If variable X is a 32-bit integer at address 0x1234, reading it as a long, char or short always generates address 0x1234. For a big-endian machine, the address changes depending on how you want to read the variable. Reading it as a char generates address 0x1237. Reading it as a short generates 0x1236.

Not a huge deal, but back in the day gates were more expensive.

"rickman" skrev i meddelandet news: snipped-for-privacy@f16g2000cwb.googlegroups.com...

The Series 32000 had bit instructions which could address up to 1 Gbit from a base address.

The final word in this discussion came about 20 years ago.

The only good endian is a DEAD endian!

I can't say I undestand. If you have a 32 bit integer, in what context would it be permissible to read it as a char? Why would this be a function of the hardware rather than the software? Maybe I have been working with MCUs too long, but I am missing this.

My understanding is that little and big endian-ness came about the same way that msb and lsb bit numbering came about. Two different companies had different ideas of which was better. If I am not mistaken, this is still a topic of some debate. Personally I prefer to order the bytes with the ls byte first, followed by the ms byte and followed by all intermediate bytes. This way you only need to increment by 1 to address the sign bit vs addressing the low byte. Sounds pretty optimal, no?

I have worked on machines that include the above facility in the ISA. Bit order is also important in serial machines and there are many examples of parallel architectures which put the opcode, modifiers and addresses in unconventional positions or orders, sometimes with LSB first in a field. Manipulating subsets or supersets of these fields requires knowledge of bit order.

Regards,

Michael Grigoni Cybertheque Museum

This is unrelated to the issue of endian-ness. Only if the bits in a word are directly addressable as part of a general address is the endian-ness an issue. Sure, you need to know how the machine maps bit fields in an instruction to make it work correctly, but everything about accessing data is not endian-ness.

There have been a few machines that were addressable at the bit level, but none have been popular and mostly they have had little impact on computing.

What do you mean "permissible"? In C the following is permissible:

char x; long y;

x = y;

If y is static, then the address to be read for the assignment statement can be calculated at compile time, so it doesn't really matter. If y is being accessed indirectly, then the address must be offset by 3 at run-time:

char x; long *yp;

x = *yp;

The assigment statement above must generate a read of adderss (yp+3) for big-endian machines. On some CPUs, that would require an extra instruction or two compared with generating a read of addresss (yp).

It usually isn't -- which is why a said little endian can be simpler for the hardware or the compiler.

yes and all loops end in zero, so big endian has easier multiword looping. so i prefere logical big endian as per

and so say all the thugs!!

most significant at index 0 or at index X ?? i'd store strings with first character at index 1 and a zero indexed count. and C was designed by bad bad men! ;-)

cheers

Little-endiness seems to have arisen with doing mutlibyte operations on 8-bit processors. Someone thought it would be "neat" if one could start with the first byte in memory and work upward for whatever number of bytes were going to be accessed for the operation. It apparently escaped the notice of these people that starting n bytes higher and working downward accomplishes the same thing and has the bytes in a natural order for reading by humans.

As for bit-numbering, IBM (once?) used a fractional notation for binary values instead of the integer notation used by everyone else. Luckily, fractional notation is really foreign to humans and has mostly died the death it deserves. There are a few older IBMers around who use it, but it's otherwise joined the dodo bird.

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"Big-Endian byte order is known as 'normal', 'intuitive', or 'obvious'. Little-Endian is sometimes called 'perverse', 'annoying', 'dysfunctional', or 'stupid'. These designations do not, of course, imply any bias or preference."

Christopher R. Hertel, "Implementing CIFS" 2004

Bit order only existed with serial computers, in which it was natural to feed LS bit first to the 1 bit ALU for addition and subtraction. Serial computers were built with shift register, CCD or acoustic (mercury) delay line accumulators.

However, the list time I have seen a truly serial computer was the HP-35 scientific pocket calculator in the early 1970's, while other pocket calculators used bit parallel but decimal (BCD) digit serial architectures.

Paul

I've heard this argument before, but it seems somewhat contrived. Are there many programs where the same 32-bit integer needed to be read 3 different says? Most programming languages do not allow a variable to change type; the value may change type, but that usually happens when the variable is already in a register.

At one point, computers were created that had addressable memory units that were smaller than their natural internal data size, and so a decision about how to store the data had to be made. Some computers went one way, and some another. The decision was likely based upon existing software that the new computer needed to try and be compatible with. That's the story in short form.

Big-endian is easier for some things, little-endian for others. Neither is more "natural" than the other; both are unnatural.

-- Darin Johnson

Why? You just read *yp into a long register, then write the least significant byte into x.

Now a compiler may optimize this to be just a byte read on machines where the performance would make a difference (many are forced to always read a full cache block anyway). But most instruction sets for 32-bit processors already include a displacement for addressing. (though on CISCy computers with variable length instructions, it might require more space?)

Consider this case, which computers have also have to put up with regardless of byte ordering: struct mytype { int a, b, c, d; }; mytype* mp; int x; ... x = mp->d;

-- Darin Johnson

I agree. It's always sounded like after-the-fact rationalization to me, but I've seen that argument in various places.

Probably not.

My examples didn't involve a variable changing type. It involved automatic conversion of one type to another.

That's certainly one way to do it.

Yup. The "net" is big-endian, so that's a pretty good arguement for using big-endian for anything that's network intensive (firewall, router, etc.). For other things, it doesn't really matter much.

Sure. If you're on a load-store machine, that's probably the obvious way to implement that.

I was just quoting the oft-cited argument for little-endian. I didn't claim it was a good argument or that I agreed with it. I actually prefer big-ending, but that's because I work on a lot of network-centric stuff and it's easer to read hex dumps.

Not really on the PowerPC. The bit numbering is just a convention, invisible to the programmer.

However, there are rotate and mask instructions on the PowerPC that can sort of act like bit operations. But they take bit counts and not indexes.

To further obfuscate this, there are "simplified mnemonics" (ie, macros) built on these rotate and mask instructions that take bit positions. These happen to be the same as the Motorola bit numbering. But I can't imagine anyone using these mnemonics without also knowing what the conventions are.

-- Darin Johnson

Computers can address bytes directly. Very very few computers have been built that allow addressing of individual bits. Endianness is all about how data is stored in *memory*. It has little to do with how the data is used internally on a computer.

Now when you look at the lines coming out of a processor, the data lines may be numbered D0 up to D7 (or even D15 or D31). This can be wired to memory in any order you want. You can have D0 be the most significant bit or the least significant bit. It does not matter at all. This is because when you read the data back, you get the bits back in exactly the same order that they were written. Even if you shuffled all the pins around on purpose, the bits would be unshuffled when you read them back.

If you have more than one processor sharing the memory, or other devices, then you have to make sure that the bits line up correctly (ie, you can't shuffle the bits in different ways). It doesn't matter though what the order is, as long as the most significant bit connects to the other most significant bits on the other processors, and so forth.

Different processors may name these pins different things, but that does not matter. As long as the pins are wired up correctly the names can be anything you want.

-- Darin Johnson

Computers can address bytes directly. Very very few computers have been built that allow addressing of individual bits. Endianness is all about how data is stored in *memory*. It has little to do with how the data is used internally on a computer.

Now when you look at the lines coming out of a processor, the data lines may be numbered D0 up to D7 (or even D15 or D31). This can be wired to memory in any order you want. You can have D0 be the most significant bit or the least significant bit. It does not matter at all. This is because when you read the data back, you get the bits back in exactly the same order that they were written. Even if you shuffled all the pins around on purpose, the bits would be unshuffled when you read them back.

If you have more than one processor sharing the memory, or other devices, then you have to make sure that the bits line up correctly (ie, you can't shuffle the bits in different ways). It doesn't matter though what the order is, as long as the most significant bit connects to the other most significant bits on the other processors, and so forth.

Different processors may name these pins different things, but that does not matter. As long as the pins are wired up correctly the names can be anything you want.

-- Darin Johnson

IIRC, the LGP-30 (and probably the RPC-4000) also used fractional notation and it was quite natural once learned. Circuit design and efficiency made it a logical choice.

Regards,

Michael

Responding to this statement would be the start of a wonderful thread in another newsgroup and deserves argument, however I submit that architectures with the greatest 'impact on computing' in the last twenty years have done so not on their technical merits.

Regards,

Michael