Control loop precision

I'm assuming that the PI controller is controlling the PWM.

This is complicated. The best quick estimate ("quick" is a relative term, here) is to make a block diagram of the whole system, with noise injection at each point where you can identify an error. Turn the known error sources into noise of the appropriate type (i.e., white, DC, synchronous with the BLDC, or worst-case). Then add them up.

For quantization noise, if you really want to be honest with yourself, you should find the system response to the noise over frequency, pick the worst-case frequency, and put all of the quantization noise there. That's because that worst-case frequency is often where the thing will be oscillating around the quantization, unless there's enough other noise in the system to scramble it.

It's lots of icky-picky work, but as long as you keep careful track of dimensions (i.e., put signals into "volts", "amps" and "counts", and express gains as "volts/count", "counts/volt", "volts/amp", etc.), then you should have a straight road to getting an answer.

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Tim Wescott 
Control systems, embedded software and circuit design 
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correct assumption and the PI output is over a 12 bit, while the PWM is

9 bit due to PWM carrier and main clock onboard (f_pwm = 88 kHz, f_clk = 40 MHz => only 450 periods available, minus some dead zone at the extremities of the full ranges due to H-bridge MOS transition time). Therefore whatever kind of precision I have at the level of the PI it is screwed up by a factor 4 in the PWM and I'm not sure I can do anything about it.

Why adding them up? If the sources of noise can be demonstrated independent, couldn't I simply square root the squared sum of them? It is certainly less accurate since it's based on the assumption that noise distributions are normal but is certainly more likely than the worst case scenario of the total sum.

We have the possibility to add some dither, but I'm not sure yet how to use it. But back to basis, you're suggesting to inject a noise spectrum at each entry point and then measure the noise spectrum at the output since we are assuming an LTI system, right? But shouldn't we add power density?

Is the control loop frequency response going to cut off some of the noise?

That is correct and each of these conversions in the digital domain will include an error due to the operation precision I suppose. I believe I may need to increase the PI data width in order to avoid overflow in the multiplication.

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Then your overall precision is no better than 9 bits. Perhaps you need a faster CPU.

Generally in systems like this the noise level adds dither, free of charge.

I'm suggesting that you do this on paper, and calculate the noise spectrum at the output.

To the extent that you can count on the noise being independent and random, yes, you should add it in the mean-square sense. It's not necessary to add power densities unless you want a predicted output spectrum.

More like it'll enhance it -- but the plant response should cut off some high-frequency noise.

You need to do your calculations, first.

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Tim Wescott 
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I'm looking for work -- see my website!

Typically the precision of the drive that's applied to a motor can be far less than what you need at the motor shaft. So I wouldn't hold to this rule of thumb too tightly.

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Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com 

I'm looking for work -- see my website!

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Yes, i know. The current precision (which he asked) is 9 bits, but the spe ed precision (which people are interested in) could be far less. The curre nt to speed ratio can also depend on age. However, higher current precisio n will certainly give better speed precision.

Not necessarily. If the bandwidth of the motor is significantly lower than the PWM frequency (which it almost certainly is), then you can get some more bits by dithering the PWM value. After all, isn't the basis of PWM using a ONE bit signal to generate a much higher number of states. It helps to be smart in how you do the dithering, to keep the frequency component of the dither high.

Unless there's sufficient noise in the system, in which case you get dither for free.

I've dithered PWM signals before; it works quite well.

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Tim Wescott 
Control systems, embedded software and circuit design 
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a faster CPU.

one way of doing it would be to use delta sigma modulation to noise shape the quantization to 9 bit pwm

-Lasse

Lasse, you beat me to this. I was going to say that to shape the spectrum of the dither noise you'd need to put feedback around the quantization.

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Fully explained here -- at least up to a 1st-order sigma-delta. I don't know more is necessarily better for most plants.

--
Tim Wescott 
Control systems, embedded software and circuit design 
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Hi Tim,

On 05.06.2016 01:55, Tim Wescott wrote: []

[]

We've had the same idea in our group. It's a tradeoff since the extra delta-sigma implies additional resources that we do not easily get on a small size FPGA, moreover we have three three-phases bldc motors to drive and therefore 9 delta-sigmas may be quickly a resource hungry solution.

Certainly if the system is left as is, the precision is driven by the 9 bits PWM. Since I believe the instantaneous precision is not what matters most, the sigma-delta may be a viable solution.

Certainly increasing the system clock is not an option, a one bit precision increase would mean going from 80 MHz to 160 MHz and I may have side issues with time closure on the FPGA design, other than potential implications in my radiated performances.

As a side question, what would be a good measurement setup for assessing precision? How would I judge how many points I need to collect and at which sampling rate? Should I then measure RMS? What kind of bandwidth my measurement system should have? The higher harmonic content of the PWM is certainly something I'm not particularly interested in, neither is the customer since the motor has a strong low-pass filter behavior.

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Hi Edward,

On 03.06.2016 22:59, snipped-for-privacy@gmail.com wrote: []

Unfortunately I do not have many details on the position precision required at system level since we are providing only the platform, while the controller parameters are set by the customer. The controller is an IIR with feed forward and a transfer function to convert torque into current.

On the contrary, the current loop is designed in order to move the motor pole far away from the signal band in order to avoid stability issues.

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Hi Tim,

On 05.06.2016 01:55, Tim Wescott wrote: []

While the paper in general is quite clear on the advantage of the sigma-delta, I didn't quite understand the examples, especially the first one.

On the phase-locking system, why would you need a 10 or even 12-bit DAC? I reckon that for 0.5 degree requirement a 200/512=0.39 degree would be more than sufficient, therefore a 10-bit would suffice.

Secondly, how do you get to the 0.031 degrees/sample^2 with the sigma-delta? I didn't quite get that.

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t

it is one register and an adder

-Lasse

n:

d y o 88 e I

might be a good idea top stick to first order anyway, since it unconditionally stable

-Lasse

On 05.06.2016 21:56, snipped-for-privacy@gmail.com wrote: []

Nothing is free in life! The register and adder would need to be configured according to the limits for the range at minimum, meaning additional control logic and parameters to store plus logic to max the output. I can easily eat up few percents of my real estate, which is not currently an issue, given the margins we have, but which may be one day.

We have already an arithmetic unit onboard, but is shared and accessed through a central bus. Adding traffic on the bus just for the sigma-delta would eat-up too much bandwidth. But I think that a local adder won't hurt much.

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Are you driving the PWM from software on a processor, or is it on the FPGA?

There should be plenty of time to implement that as the last block in a software-based control loop, assuming you need it at all.

If you can take a quick look at the PWM command you'll know -- if it's already bouncing all around from noise, then there's no need to add dither of your own.

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Tim Wescott 
Control systems, embedded software and circuit design 
I'm looking for work!  See my website if you're interested 
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On 06.06.2016 04:28, Tim Wescott wrote: []

It's in the FPGA, no software allowed :-/. In some sectors of the space industry software is still seen as a witchcraft and avoided at any cost, at least in some types of application. I find it completely idiotic but that's how it is.

[]

The unfortunate thing is that we're only building the controller, while the integration with the motor is performed on the customer site. On our site we simulate the motors with passive loads and any effect related to the motor is addressed by design (back-emf, dynamics, etc.).

But as Lasse mentioned it shouldn't be complicated to include a first order delta-sigma. I'd try to model it first and see the effect.

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