ARM cache misses and performance

Motivated by the code optimization thread I started to question some of the things I do when writing code.

A question that I can't easily answer myself is about ARM instruction scheduling (XScale and Arm9 in my case). I've read all I could find but all the documents form ARM don't tell me what happends during a cache miss. Now I wonder:

If a load is outstanding due to a cache-miss, will the CPU continue to execute instructions as long as the result of the load is never used, or will it halt the pipeline until the data is there?

I always try to schedule my loads as early as possible and interleave as much unrelated code as possible. I've ever done this since I've programmed on my first CPU with cache (the 386).

Never questioned myself if the same has any benefit on the ARM-architecture as well.

It does not hurt performance, but it makes the assembly less readable.

Nils

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Nils
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