Anyone with milage on the TMS470R1B1, and IAR IDE for same?

That doesn't sound good (I know: Hello, Mr Obvious!). Check whether the vector table offset register is getting set to the expected value. In the CM3 chips I'm mostly using now (STM32), the vector table offset register at 0xE000ED08 gets loaded with the actual (not remapped) address of the table in flash (0x08000000) (which gets automagically reflected to 0x00000000 on execution). This, or similar, ought to happen as pretty much the first set of instructions in the startup code.

Also, the vector table has strict alignment requirements. If you don't align it properly, it may grab the wrong vector.

At the moment I'm pretending that interrupts were never invented, but I'll be doing something like that in my investigations.

I just found out that the SPI register definitions are completely wrong

-- it's like they took the definitions for a completely different processor and put them into the header file with my processor's name.

Granted, it's an obscure high-temperature part I'm using (I can't remember the number off hand, SM470R1B1 or some such), but I pulled the data sheet for the TMS470R1B1 to double-check, and they match). I suspect that some serious bugs have managed to check themselves into the code tree without getting found.

I suppose I should email them, give 'em a chance to do something about it. This is _frustrating_. When the customer said "we'll get the IAR system so we'll all be on the same IDE" I kinda rolled my eyes, because as far as I'm concerned an IDE is just training wheels that keep you up but wobbly, for as long as the project goes in the direction that the IDE vendor anticipated. But I figured it'd be about their speed, and after all we'd at least _get the damn thing working_.

Hello Tim, I couldn't find many references - a search on TI website comes up blank

- but it seems to be an ARM7 not a Cortex M3 - if your tools are set up for an M3 there is no way it will work. ARM7 interrupts are horrible (for embedded stuff) and completely different. Michael Kellett

Last time I used an IAR IDE it crashed when you expanded the main window beyond 1024x768 :)

But that was 15 years ago, hopefully they have fixed that one :)

Even if you don't use interrupts, yet, the table gets used. The first entry in the exception table is the value of the main stack pointer and the second is the application entry point. Also, as Arlet mentions, the alignment is not arbitrary. Presumably, though, they got the basic (generic CM3) part right else you'd not even start up.

I should be callused enough by now to not be surprised by this but it still astounds me.

Oh well, that's why embedded developers get the big bucks. ;-)

Somehow I ended up with an architectural manual for the "TMS470M" that _does_ list an M3 core. I'm pretty sure that the TI web site pointed to that document for me, but I may have provided my own screw-ups. Finding the _right_ architectural manual for the chip will probably go a long way toward alleviating confusion.

It _was_ TI!!! The data sheet lists the ARM7TDMI core, but the processor user's guide that they refer to lists the Cortex M3.

Grrr.

Somehow I suspect that the TMS470M, whatever that is, is a TMS470R with a Cortex M3 slipped in there. Which doesn't help me very much at all, but certainly saves me from the stupidest of mistakes.

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Yes, i believe TMS470 is ARM7. That's why TI brought LMI for the M3 design in the first place.

I like the ex-Luminary parts. Of course, I haven't tried using their power-down modes, which are, I am told, fraught with errors in the silicon.

I have a customer who has used them, and ended up with an 8-pin AVR or PIC or similar just to bring the main chip out of sleep mode. For some reason, they don't use the ex-Luminary parts any more.