what is voltage at sources of diffamp?

Hi,

With a standard CMOS diffamp configuration ie. a current sink with two NMOS transistors above it with both sources connected to the current sink, the drains connected to some load (I don't care what), and two seperate gate voltages, what determines the voltage across the current sink? If my description is confusing, try this picture, but with mosfets instead of BJTs (I don't know if it makes a difference?):

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If the two gates are at the same voltage, then their sources will obviously be Vt+Vsat below the gates, perhaps 1V below (for Vt=0.7). But if I set Vgate1=Vc and Vgate2=Vc+1, then I find from a quick simulation that the voltage at the mostfets source is Vc+(1/2)-Vt- Vsat, ie. halfway between the two source voltage points. But why is this?

If the first mosfet wants to set its source to Vcommon-Vt-Vsat, and the second mosfet wants to set its source to Vcommon+1-Vt-Vsat, and if both sources are connected together by a zero ohm connection (assuming an ideal simulation), then wouldn't an infinite current try and flow between the two mosfets??

If this makes sense to anyone, please enlighten me!!

Thanks!

Ted

Reply to
tedthornton11
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Vgs is not fixed, and the source terminal is not an ideal voltage source. The MOSFET with the higher gate voltage raises the common source voltage. This reduces Vgs and Id of the other MOSFET.

Reply to
Andrew Holme

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