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Simple op-amp summing junction question

This question arose from the typical "what do I do to protect an op- amp when the input voltage is higher than supply?"

In a typical non-inverting configuration the answer seems straight forward since the input will be at the non-inverting pin of the IC. If the input voltage is higher than supply a simple series resistor to current limit can be suitable in most cases.

With a typical inverting configuration things seem to be a bit more nebulous. The voltage at the inverting pin of the IC will be held at virtual ground (ideally) so a higher than supply input voltage coming in on the input resistor does not immediately seem to be an issue.

I am trying to think of a way to violate this; i.e., make the voltage at the summing junction be a diode drop higher/lower than either of the supply voltages, and simulate in Spice. My configuration is as follows: Vcc = +5V Vee = -5V Rin = 10k Rf = 3k Vin = +15V Vo = -4.5V

If I assume that the amplifier is in this state for a while the summing junction would be ideally held at virtual ground. Now, if I have a step input down to -15V, I am imagining that the output would STILL be -4.5V for some period of time (ns, us). It will take a period of time for the output of the amplifier to slew to the proper output thus forcing the summing junction to virtual ground to make all is well in the universe.

During this transient, I am calulating that the summing junction will be ~-6.9V. This is more than a diode drop "lower" than the negative supply rail thus turning on the internal ESD protection diodes so input current limitation techniques must be used.

I am having trouble catching this in simulation. Perhaps I do not have my sim set up correctly? I only see a transient of ~-1.3V which is well within the supply rails.

Am I correct or am I all wet?

formatting link

A link to show the math I calculated. Hope I didn't make a mistake!

Reply to
Kingcosmos
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You may have to make sure that current goes somewhere that does not cause trouble. Some opamps (like the LM324) do not clamp positive voltages with any internal clamp diodes, so the voltage might rise to where damage is done. Some opamps clamp the voltage, but current through these clamps cause the amplifier to draw excessive supply current. So you might need to add an external clamp diode to the positive rail, or a zener diode to ground.

The input voltage is held to a fixed voltage that matches what is applied to the non inverting input, only as long as the output voltage is not saturated or slew rate limited.

As long as the output is not saturates, there is not a thing wrong with having the voltage applied to the input resistor being outside the supply rail voltages. But if that input voltage went to +40 volts, the inverting input would be driven above the +5 rail.

Right. For a brief period, the virtual ground will not be enforced because the output is in slew rate limit or waiting for the propagation delay of the amplifier.

Yes. I would split the input resistor into two equal halves and add a pair of clamp diodes to the rails from that node. This makes sure that, no matter what, the input will never see more than a diode drop outside the rails through 5k of resistance.

I think you have a valid concern. This is usually not a problem for signals created on the board from the same rails, but for signals and static discharges from off the board, such details can make the difference between a robust and a fragile system.

Reply to
John Popelish

I am glad that it was not a stupid question, coming from a junior engineer. Excellent response John; I appreciate your insight.

Reply to
Kingcosmos

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