offset error adjustment circuit

A group that allows graphic attachments is: alt.binaries.schematics.electronic Unfortunately, this (and all groups with graphic content) is not archived nor is it accessible through Google Groups, but only through direct access to a usenet server.

If you contact your Internet service provider, they can probably tell you how to post directly to and read from their usenet server.

Till you work that out, you may email me a schematic and I will post it to alt.binaries.schematics.electronic for you, under this thread title, with instructions to comment back here for you.

Or you can locate one of the many free photo posting services on the web and put the schematic up, there, and bring us the URL for that location.

The PA85 is a power amplifier with mediocre input offset voltage and offset drift specs. A better, precision amplifier like the OPA can be used to measure and correct for the input offset of the PA85. The result is a "composite" amplifier, combining the best features of both.

You can post a pic to one of the free image hosting sites, like Supload, and give us the link here.

John

Why not try making an "ASCII schematic"? First, your browser or usenet program must be set to display in a fixed-spacing (non-proportional) font, such as Courier or Courier New.

Then use - + | and similar symbols to draw your circuit.

The advantages are substantial: Everyone can instantly see your circuit and think about it, and the circuit and discussion surrounding it are archived on Google.

I have seen circuits that use an inverting integrator, A2, from the output of A1 that feeds back to the non-inverting input of A1 for 'auto-zeroing' DC offset.

Here is part of the schematic

I think this circuit is pretty simple to describe. Lets assume the PA85 amplifier has a 10 mV offset. If its + input were grounded, that offset would be forced to appear at the - input, and when the input voltage at the left were exactly zero, there would be 10 mV across the input voltage to current converting input resistance (made up of the total of R32, 35 and 37). That voltage would produce a current through those resistors that would ramp the integrating capacitor around the PA85 at a steady rate.

The additional opamp (with an assumed offset that is a tiny fraction of that of the PA85) which according to this data sheet:

has a maximum of about 0.165 mV.

Any offset voltage appearing at the - input of the PA85 is integrated (and inverted) by the OPA277 and that integrated output is connected as the reference for the PA85 integrator, in stead of ground. This shifts the - input voltage toward zero and the OPA277 integration slows to a crawl as the voltage approaches the much lower offset of the OPA277. Equilibrium is reached when the voltage at the - input of the PA85 is the offset voltage of the OPA277, and the voltage of the + input of the PA85 is the negative of its offset plus the offset of the OPA277. The gain of the PA85 keeps its - input voltage very stable, in spite of any input voltages from the HV boost input, so the OPA277 essentially ignores the actual input signal and responds only to offset.

The jfets-as-diodes trick looks a bit extreme, given that this is a pretty low-impedance circuit.

I've seen a variant, where the precision opamp is in the forward gain loop, not just off to the side. There was an Apex appnote for improving both the DC and the noise behavior of one of their all-CMOS opamps that was very bad in both respects.

John

(snip)

After looking at the data sheet for the PA85:

with something like 2 mV of offset, unless you pick a high priced version of the OPA277, the improvement with this circuit isn't that dramatic. If I was going to go to all this trouble, I think I might use an auto zero opamp. Perhaps something like an LTC1150 with worst case offset voltage of 10 uV: