AoE3 D-flips and glitches

George Herold · 2016-01-19T18:23:19+00:00

As part of reintroducing myself to digital electronics, I've been reading chapter 10 of AoE3. My question regards the footnote (60) on page 738. Fig 10.73 shows how a rising edge D-FF can make a glitch. Putting an inverter in the clk line might make a glitch at the leading edge.. (if the D-flip is faster than the inverter.) So the rather obvious answer is to stick the inverter before the clock input of the D-flip.. giving two propagation delays in that section.... Is that the "right" answer? Tia George H.

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Jim Thompson 10 years ago

However sometimes we make typos... it's March _31_ ...Jim Thompson

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John Larkin 10 years ago

I have observed the mating habits, and mates, of male engineers for some time. I haven't observed enough cases of female engineers to see the patterns, but that would sure be interesting too.

I have two female engineers now. I haven't met one of their husbands, but I have met one of their wives.

John Larkin Highland Technology, Inc lunatic fringe electronics

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Phil Hobbs 10 years ago

How's the BH doing?

Cheers

Phil Hobbs

Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net

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Jim Thompson 10 years ago

Scheduled to see a neurosurgeon and they're not saying what the MRI showed :-( ...Jim Thompson

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Phil Hobbs 10 years ago

Nervous-making for sure. Still praying.

Cheers

Phil Hobbs

Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net

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Jim Thompson 10 years ago

Thanks! ...Jim Thompson

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AoE3 D-flips and glitches

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