the hot new programming language

Moore's law has not been holding as of late when you consider the speed. Over the last 10 years or so they have been focusing on eliminating the massive heat sinks required to continue on the earlier path (there have been CPUs dissipating as much heat as a 100 watt lightbulb) with the result that CPU clock speed has not improved at all and CPU performance only trickles ahead each year. So process improvements are no longer a salvation.

The real issue is that it is silly to think there is no cost to using ever increasing amounts of CPU performance. John's own project used a CPU/FPGA which was designed in, only to find he unexpectedly required a bloody CPU fan over the chip. Yeah, he still has room to replace that with an x86 and a GPU or even a bank of GPUs. But at some point Samaritan will decide the computer is a threat and have Decima kill John. So it is a slippery slope.

On Fri, 03 Jul 2015 12:23:56 -0400, Joe Gwinn Gave us:

That would make *you* "The Fifth Element". (or Fifth Elemental) :-)

On Fri, 03 Jul 2015 12:21:53 -0400, DecadentLinuxUserNumeroUno wrote:

I've got several versions, fiddled with now and then in my spare time. Can't recall if I posted the "latest" one. It will certainly change some when it gets to be a real-world PCB schematic. The customer(s) already want more voltage at the Widget, so I need maybe 1400 from the supply, no big deal, just tweak the feedback.

This is about it for now, until I get a purchase order. The sim helped estimate parts cost and board size and such.

Version 4 SHEET 1 2184 704 WIRE 1248 -608 1184 -608 WIRE 1376 -608 1312 -608 WIRE 1440 -608 1376 -608 WIRE 1568 -608 1504 -608 WIRE 1376 -576 1376 -608 WIRE 1024 -432 944 -432 WIRE 1184 -432 1184 -608 WIRE 1184 -432 1088 -432 WIRE 1248 -432 1184 -432 WIRE 1344 -432 1312 -432 WIRE 1376 -432 1376 -512 WIRE 1376 -432 1344 -432 WIRE 1440 -432 1376 -432 WIRE 1568 -432 1568 -608 WIRE 1568 -432 1504 -432 WIRE 1184 -400 1184 -432 WIRE 1376 -400 1376 -432 WIRE 784 -272 720 -272 WIRE 944 -272 944 -432 WIRE 944 -272 848 -272 WIRE 1040 -272 944 -272 WIRE 1184 -272 1184 -336 WIRE 1184 -272 1104 -272 WIRE 1248 -272 1184 -272 WIRE 1376 -272 1376 -336 WIRE 1376 -272 1248 -272 WIRE 1568 -272 1568 -432 WIRE 1568 -272 1520 -272 WIRE 1184 -240 1184 -272 WIRE 1568 -240 1568 -272 WIRE 944 -224 944 -272 WIRE 0 -208 -96 -208 WIRE 144 -208 64 -208 WIRE -96 -112 -96 -208 WIRE -16 -112 -96 -112 WIRE 144 -112 144 -208 WIRE 144 -112 64 -112 WIRE 240 -112 144 -112 WIRE 288 -112 240 -112 WIRE 496 -112 288 -112 WIRE 720 -112 720 -272 WIRE 720 -112 576 -112 WIRE 784 -112 720 -112 WIRE 944 -112 944 -160 WIRE 944 -112 848 -112 WIRE 1088 -112 944 -112 WIRE 1184 -112 1184 -176 WIRE 1184 -112 1088 -112 WIRE 1264 -112 1184 -112 WIRE 1312 -112 1264 -112 WIRE 1568 -112 1568 -160 WIRE 288 -64 288 -112 WIRE 496 -64 496 -112 WIRE 576 -64 576 -112 WIRE -96 -48 -96 -112 WIRE 144 -48 144 -112 WIRE 1088 -32 1088 -112 WIRE 1184 -32 1184 -112 WIRE -96 64 -96 32 WIRE -16 64 -96 64 WIRE 144 64 144 32 WIRE 144 64 48 64 WIRE 288 64 288 0 WIRE 336 64 288 64 WIRE 496 64 496 16 WIRE 496 64 416 64 WIRE 576 64 576 16 WIRE 576 64 496 64 WIRE 624 64 576 64 WIRE 656 64 624 64 WIRE 1088 96 1088 32 WIRE 1184 96 1184 48 WIRE -96 112 -96 64 WIRE 576 112 576 64 WIRE 944 112 944 -112 WIRE 144 144 144 64 WIRE 352 192 272 192 WIRE 480 192 432 192 WIRE 528 192 480 192 WIRE 944 240 944 192 WIRE 944 240 720 240 WIRE 16 256 -96 256 WIRE 352 256 272 256 WIRE 480 256 432 256 WIRE 576 256 576 208 WIRE 576 256 480 256 WIRE 576 288 576 256 WIRE -96 304 -96 256 WIRE 944 304 944 240 WIRE 304 320 272 320 WIRE 576 400 576 368 WIRE -96 416 -96 368 WIRE -16 416 -96 416 WIRE 144 416 144 368 WIRE 144 416 64 416 WIRE 944 432 944 384 WIRE 304 448 304 320 WIRE 480 448 304 448 WIRE 720 448 720 240 WIRE 720 448 480 448 WIRE 144 464 144 416 FLAG 144 464 0 FLAG 576 400 0 FLAG 1088 96 0 FLAG 1184 96 0 FLAG 1264 -112 HV1 FLAG 944 432 0 FLAG 240 -112 IN FLAG -96 112 0 FLAG 1568 -112 0 FLAG 1248 -272 HV2 FLAG 1344 -432 HV3 FLAG 1520 -272 HV4 FLAG 624 64 QD FLAG 480 192 QG FLAG 480 256 QS FLAG 480 448 FB SYMBOL PowerProducts\\LTC3803 144 256 R0 SYMATTR InstName U1 SYMBOL ind2 480 -80 R0 WINDOW 0 -17 36 Right 2 WINDOW 3 -8 71 Right 2 SYMATTR InstName L1

SYMATTR Type ind SYMATTR SpiceLine Ipk=3.0 Rser=0.01 Cpar=1pF SYMBOL ind2 592 32 R180 WINDOW 0 -22 77 Right 2 WINDOW 3 -12 42 Right 2 SYMATTR InstName L2

SYMATTR Type ind SYMATTR SpiceLine Ipk=20 Rser=1m Cpar=2pF SYMBOL nmos 528 112 R0 WINDOW 0 114 48 Left 2 WINDOW 3 75 84 Left 2 SYMATTR InstName Q1 SYMATTR Value Si9420DY SYMBOL res 560 272 R0 WINDOW 0 66 54 Left 2 WINDOW 3 48 88 Left 2 SYMATTR InstName R1 SYMATTR Value 100m SYMBOL res 128 -64 R0 WINDOW 0 -50 33 Left 2 WINDOW 3 -52 64 Left 2 SYMATTR InstName R2 SYMATTR Value 1K SYMBOL res 928 208 M180 WINDOW 0 -97 78 Left 2 WINDOW 3 -114 42 Left 2 SYMATTR InstName R3 SYMATTR Value 7Meg SYMBOL res 928 400 M180 WINDOW 0 -74 64 Left 2 WINDOW 3 -80 31 Left 2 SYMATTR InstName R4 SYMATTR Value 20K SYMBOL cap 1072 -32 R0 WINDOW 0 -61 25 Left 2 WINDOW 3 -64 58 Left 2 SYMATTR InstName C1 SYMATTR Value 66n SYMATTR SpiceLine Rser=10m SYMBOL res 80 400 R90 WINDOW 0 7 110 VBottom 2 WINDOW 3 29 111 VTop 2 SYMATTR InstName R5 SYMATTR Value 20K SYMBOL cap -80 368 R180 WINDOW 0 -55 64 Left 2 WINDOW 3 -62 31 Left 2 SYMATTR InstName C2 SYMATTR Value 10n SYMBOL voltage -96 -64 R0 WINDOW 123 -220 84 Left 2 WINDOW 0 50 34 Left 2 WINDOW 3 50 66 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 24 SYMBOL res 1168 -48 R0 WINDOW 0 63 38 Left 2 WINDOW 3 64 71 Left 2 SYMATTR InstName R250 SYMATTR Value 250K SYMATTR SpiceLine pwr=12 SYMBOL res -32 -96 R270 WINDOW 0 43 61 VTop 2 WINDOW 3 -9 58 VBottom 2 SYMATTR InstName Rmon SYMATTR Value 1m SYMBOL cap 64 -224 R90 WINDOW 0 -47 29 VBottom 2 WINDOW 3 -40 30 VTop 2 SYMATTR InstName C4 SYMATTR Value 50m SYMBOL diode 784 -96 R270 WINDOW 0 -31 30 VTop 2 WINDOW 3 -32 31 VBottom 2 SYMATTR InstName D2 SYMBOL diode 960 -160 R180 WINDOW 0 56 41 Left 2 WINDOW 3 64 9 Left 2 SYMATTR InstName D1 SYMBOL cap 784 -256 R270 WINDOW 0 111 33 VTop 2 WINDOW 3 104 34 VBottom 2 SYMATTR InstName C6 SYMATTR Value 22n SYMBOL cap 1200 -176 R180 WINDOW 0 -59 45 Left 2 WINDOW 3 -65 15 Left 2 SYMATTR InstName C7 SYMATTR Value 22n SYMBOL diode 1040 -256 R270 WINDOW 0 72 33 VTop 2 WINDOW 3 67 33 VBottom 2 SYMATTR InstName D3 SYMBOL res 1552 -256 R0 WINDOW 0 -119 60 Left 2 WINDOW 3 -116 97 Left 2 SYMATTR InstName R1200 SYMATTR Value 600K SYMBOL diode 1200 -336 R180 WINDOW 0 58 38 Left 2 WINDOW 3 63 6 Left 2 SYMATTR InstName D4 SYMBOL cap 1392 -336 R180 WINDOW 0 44 0 Left 2 WINDOW 3 36 -31 Left 2 SYMATTR InstName C5 SYMATTR Value 22n SYMBOL diode 1248 -416 R270 WINDOW 0 -34 31 VTop 2 WINDOW 3 -37 31 VBottom 2 SYMATTR InstName D5 SYMBOL cap 1024 -416 R270 WINDOW 0 77 32 VTop 2 WINDOW 3 71 33 VBottom 2 SYMATTR InstName C8 SYMATTR Value 22n SYMBOL diode 1392 -512 R180 WINDOW 0 -37 -6 Left 2 WINDOW 3 -27 -35 Left 2 SYMATTR InstName D6 SYMBOL cap 1440 -416 R270 WINDOW 0 -39 32 VTop 2 WINDOW 3 -49 30 VBottom 2 SYMATTR InstName C9 SYMATTR Value 22n SYMBOL diode 1440 -592 R270 WINDOW 0 -31 30 VTop 2 WINDOW 3 -32 31 VBottom 2 SYMATTR InstName D7 SYMBOL cap 1248 -592 R270 WINDOW 0 -38 33 VTop 2 WINDOW 3 -43 34 VBottom 2 SYMATTR InstName C10 SYMATTR Value 22n SYMBOL res 448 240 R90 WINDOW 0 68 52 VBottom 2 WINDOW 3 75 53 VTop 2 SYMATTR InstName R7 SYMATTR Value 5K SYMBOL res 448 176 R90 WINDOW 0 -44 52 VBottom 2 WINDOW 3 -37 53 VTop 2 SYMATTR InstName R8 SYMATTR Value 33 SYMBOL res 432 48 R90 WINDOW 0 -40 54 VBottom 2 WINDOW 3 -33 55 VTop 2 SYMATTR InstName R6 SYMATTR Value 1K SYMBOL cap 272 -64 R0 WINDOW 0 -44 24 Left 2 WINDOW 3 -47 58 Left 2 SYMATTR InstName C3 SYMATTR Value 47p SYMBOL cap 48 48 R90 WINDOW 0 7 -4 VBottom 2 WINDOW 3 24 -2 VTop 2 SYMATTR InstName C11

TEXT 536 -160 Bottom 2 !K1 L1 L2 1 TEXT 216 -408 Left 2 !.tran 12ms startup TEXT 472 -224 Left 2 ;DRQ127 1:1 TEXT 736 272 Left 2 ;0.8V TEXT 992 -224 Left 2 ;MMBD5004 TEXT 112 -472 Left 2 ;HV SUPPLY J LARKIN June 30, 2015 TEXT 792 -312 Left 2 ;500V

On Fri, 03 Jul 2015 10:23:50 -0700, John Larkin Gave us:

Or add one more multiplier stage, since you are well below any power requisite. It would probably run even better.

Either way, but fewer parts is better; it's looking lopsided already. Adding another mult stage reduces my HV1 output, which is more than I need anyhow.

Looks like 2 mA at 1400 volts will be plenty, so that cheap stock Coiltronics transformer is still OK.

The real advantage, to me, of using Spice here, is evaluating the magnetics. Magnetics tend to be a pain. Spice computes the peak and RMS coil currents, something I prefer not to do any other way.

I could buy a potted brick proportional (unregulated) HV supply for a bit over $100, but it wouldn't make HV1 and I might need to close a feedback loop around it to nail the output voltage. And it wouldn't be as much fun.

On Fri, 03 Jul 2015 10:45:15 -0700, John Larkin Gave us:

Their problem is that there are few, if not no models of xformers with a single turn feedback winding in their libraries, and adding one doesn't work, because it needs to be magnetically coupled. So even their modeling structure needs work.

That is one of the main reasons I do not model my supplies with it, as I *do* use a feedback winding.

Den fredag den 3. juli 2015 kl. 20.35.39 UTC+2 skrev DecadentLinuxUserNumeroUno:

you just add the inductors and tell it what the coupling between is

-Lasse

On Fri, 3 Jul 2015 11:44:55 -0700 (PDT), Lasse Langwadt Christensen Gave us:

Thanks. It was years ago I gave up on them. Perhaps now, they have facilitated said couplings (obviously so). I give it a gander.

My HV supply model has a transformer made from two coupled inductors; I didn't use a transformer model. Just plop down a couple of inductors L1 and L2 and add a Spice directive anywhere on the screen

K L1 L2 N

where N is the coupling coefficient. N=1 is perfect coupling. K1 does slow down the simulation.

Just make the L1/L2 inductance ratio the square of the turns ratio.

You can name several inductors in the K statement, for more windings.

You can add coil ohms into each inductor, or just add resistors outside of ideal inductors. Similarly, you can tweak N down to fake leakage inductance, or add separate visible inductors.

I try to use stock surface-mount parts whenever I can. Those DRQ-series dual inductors can be very handy. As can 4-winding ISDN transformers.

Nah. They'll just bail out the culprets. As usual.

The problem with a small tax is that it won't stay small. How about a

The tax could be inverse on holding time, tapering to zero after, say,

On Fri, 03 Jul 2015 20:00:08 -0400, krw Gave us:

The term is 'culprits'. Maybe you should delay sends and proofread for a few seconds. Oh... that's right... you thought that was the correct spelling.

...and for dynamic graphing, use Visual Cobol.

Moore's law never made any claims about speed. It was specifically about the number density of transistors on a given area of silicon.

For a long while it did translate to speed gain as features got smaller with lower capacitance, higher frequencies and lower working voltages.

The time to triple the performance of bleeding edge CPUs has gone from about 2-3 years in the old days to about 5-6 years now. The absolute performance of most desktop PCs is now well beyond what any normal user will ever need apart from for video editing, gaming and running spice.

In some gaming PCs the video card has vastly more compute power than the main CPU and for the right problems there are libraries to exploit it directly like NVidias CUDA.

Although you could interpret what he said to mean that. I took it to mean the much more sensible position that modern CPUs are already so fast that you can afford to lose some performance to gain *reliability*.

The singularity is coming - beware. We are already letting computers design new bigger chips that no individual human can fully comprehend.

Deterministic number crunching computers are safe enough but when they have neural net hardware or a software simulation of it on a sufficient scale to exceed the human brain connectivity all bets are off.

it's using the wrong function strncopy is for writting to null padded records, where maximal strings are unterminated.

if you want a length limit and a nul at the end use sprintf

sprintf(dest,"%.*s",len-1,src);

On Sat, 04 Jul 2015 09:19:35 +0100, Martin Brown Gave us:

Slow light technology will usher in a simple 4 bit optical computer that puts them all to shame.

Moore's law will last forever if people keep re-defining it. The number of transistors doubled every year, like Moore said it would, from 1959 to about

Build an analog computer.

but most likely would destabilize the ...government!