Was trying to send a DVB-S signal with the AD9761 ... Did not work.
DVB-S uses QPSK..
This looked like decent QPSK on my scope:
OK wrote some test code that sends 0/1023 and 1023/0 sequentially to that chips DAC at max bit rate,
DUAL SURPRISE:
Top trace is 'I' (not me) and bottom trace is 'Q' (not from startrek).
Na, yes it is an 'interpolating dual DAC' it says in the datasheet, but HEY, I flip from zero to max and it gives me an extra step halfway in between, YES that is interpolating, BUT it also kills my bit rate, and WORST it makes my I and Q signals the same PHASE! I send them reversed, So I reversed them again in software, SAME result.
To the one who wrote the AD9761 datasheet, have you ever considered serving in ? So, anyways, when you start thinking about it (I prefer not to do that too much, makes electronics way to complicated), MAYBE if I run this thing with a clock rate of 32 x the data rate that I need, then it will _approximately_ do what I want?
Its OUT!
I will now simply connect 2 bits of the FIFO to the AD8346 QAM modulator (via hardware filters duh, good thing I have still many of those small inductors) and that gives me much higher data rate for QPSK anyways (double to start). Everybody else is doing it that way I think.. LOL. I will keep the chip in as DC bias for the QAM modulator, add some logic, (74HCT4053 or such), flipflop, and try again. It is still 2013 so...