simulating a differential pair

At the risk of pointing out the obvious....a Vector Network Analyser?

I want to simulate the board before we fab one. And we work in time domain, so we want to look at pulse edges.

Are there differential VNAs?

Oh yes. Search for R&S ZNA, 4-port VNA. Never got my hands on one -- I don't run around with that high-class crowd. 16 Smith charts: makes my head hurt.

Am 19.06.20 um 20:49 schrieb John Larkin:

Yes, it just halves the number of channels. But that is in no way different from my 54754A differential TDR. TDR in a VNA is just software, just a s-parameters from a TDR.

You could always use Keysight ADS before hardware production. 1/2 :-)

Gerhard

Here's a Spice sim of a single-ended clock line on a pc board.

I did that purely to get an annoying customer engineer off my case. There was never any doubt that the board would work well enough.

But this sim is primitive.

You can do some delay line simulations in Falstad.

You must use a single-ended format and ground on both ends.

You provide the impedance and time delays are computed in Saturn. The logical wires, ground symbols and active parts are ideal with limited variable options. (eg. You might add say 200 Ohms in series with an Op-Amp output inside the loop.) For a Cap, you might add ESR,ESL.

I disabled option/Current speed display, useful for novices.

Then apply your xx% tolerances add the stubs and use a sweep or pulse gen adding matched R impedances or mismatched.

Time sample duration is adjusted under Options/other options with < 2k dots resolution on the screen.

The right mouse and wheel also edit values. Allow some learning curve to become proficient.

I made a horrible mismatched example using both log sweep and pulse tests.

here

- with stub removed

- power changed to voltage display only

Component directions may be swapped with right mouse or drag ends and drop.

for all his java/javascript simulations there are some interesting 2D EMI ones

e.g. the charge pole or black hole

try the dipole

There you go then, John. Splash out; treat yourself. ;-)

Mesmerizing!

The via is both C and L, especially going into a package (C, L, R). Would suggest using a 100 ohm resistor from via to package, smallest part here.

I'm thinking that would add line losses and trash the signal as it progresses down the chain of receivers.