simple opamp amplifier circuit

I'm simulating on LTSpice, a simple amplifier circuit with a 2.5V offset, but if I don't include a capacitor on my input my output hits the rails... why is this? The link shows what I'm doing in LTSpice

thanks

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Reply to
panfilero
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if I don't include a capacitor on my input my output hits the rails... why is this? The link shows what I'm doing in LTSpice

This is an incomplete circuit.

Whats on the input ??

Reply to
hamilton

panfilero a écrit :

if I don't include a capacitor on my input my output hits the rails... why is this? The link shows what I'm doing in LTSpice

Assuming your DC input is 0V, then the circuit has a gain of 3 WRT to the opamp positive input and the 3x2.5V = 7.5V hits the rail.

Do you really need simulation for that?

--
Thanks,
Fred.
Reply to
Fred Bartoli

but if I don't include a capacitor on my input my output hits the rails...= why is this? =A0The link shows what I'm doing in LTSpice

With the (-) input driven from a low impedance, it's a gain of three circuit for the (+) input. (1+R1/R2)

George H.

Reply to
George Herold

if I don't include a capacitor on my input my output hits the rails... why is this? The link shows what I'm doing in LTSpice

sorry, the input signal is a sine wave, with no dc offset, at 10kHz with 0.25V amplitude

Reply to
panfilero

t, but if I don't include a capacitor on my input my output hits the rails.= .. why is this? The link shows what I'm doing in LTSpice

what's WRT?

Reply to
panfilero

With Respect To.

And you do need to think about the DC voltages: if the blocking capacitor keeps it from saturating, then your input voltage has some DC bias (if 0V is a bias) that makes the bad things happen.

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com
Reply to
Tim Wescott

  • Is there a problem with having a blocking capacitor in there?
  • What do you want the output to be?

If the answers are "no" and "0.5V amplitude centered around 2.5V", then what's the problem? If the answers aren't that -- tell us what they are.

You can do this with an all DC coupled system -- it just requires more resistors, and the amount of offset from nominal is often dissapointingly sensitive to resistor value mismatch.

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com
Reply to
Tim Wescott

This circuit has a 2:1 DC gain, so if the input is substantially away from 2.5 V, the output will saturate. The proper input range has to be between +/- 1.25 V around the 2.5 V "pseudo-ground" to keep the output voltage within the DC rails. Actually, it will be less than that, as the output swing of the op amp will be somewhat less than that.

Jon

Reply to
Jon Elson

t, but if I don't include a capacitor on my input my output hits the rails.= .. why is this? The link shows what I'm doing in LTSpice

huh?

Reply to
bloggs.fredbloggs.fred

but if I don't include a capacitor on my input my output hits the rails... why is this? The link shows what I'm doing in LTSpice

'With Respect To'

Reply to
Michael A. Terrell

but if I don't include a capacitor on my input my output hits the rails... why is this? The link shows what I'm doing in LTSpice

(huh?)? Huh? :-)

--
Thanks,
Fred.
Reply to
Fred Bartoli

"Jon Elson"

** Nope - the schem as shown has a DC gain of zero.

Without C1 ( and R2 grounded) it has a DC gain of 3, so the 2.5 volt fixed input drives to op-amp to the 5V rail.

The "pan fried sandwich" is a colossal idiot.

And you are no better.

.... Phil

Reply to
Phil Allison

Try centering the input around 2.5V instead of 0 volts

Reply to
rcmonsen

Good suggestion, bump the offset in the sig gen to 2.5V

Reply to
Dennis

Why not use a dual rail supply, virtual ground or a (-) regulated DC-DC simple converter on board to supply the (-) rail?

Jamie

Reply to
Jamie

When learning, you need to start somewhere. I see no reason to insult the original poster. Everyone else managed to be civilized.

Reply to
miso

t, but if I don't include a capacitor on my input my output hits the rails.= .. why is this? =A0The link shows what I'm doing in LTSpice

0.25V amplitude

Input signal has zero offset, opamp has half Vrail offset. Problem.

NT

Reply to
NT

On my planet, the DC gain relative to 2.5V (without C) would be

-R1/R2. i.e. -2x. I know, it is hard..

Reply to
Blarp

So capacitors conduct DC where you live? Must be pretty warm there, which figures. ;)

And if you think Phil A is wrong about what happens when you ground the C1 end of R2, why not try it and see? (Or calculate the loop currents, or use the voltage divider equation, or ....)

Cheers

Phil Hobbs

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net
Reply to
Phil Hobbs

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