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parasitic substrate bjt, how do you make it go away?

Hello all,

I will have a n-well/p-substrate photodiode (PD) on a asic. I am currently in the midst in attempting to quantify the impact of the parasitic substrate bjt that will be formed with the nearby n- wells. (E=cathode of PD, B=anode of PD, a.k.a grounded (0V) substrate, C=nearby nwells @ +1.5V). In order to minimize the [collector-base current contribution to the emitter] AND the [emitter-base current contribution to the collector], I plan to have the photodiode surrounded by a massive ring of substrate contacts. Thus the parasitic bjt aplha parameter will be as near as zero as possible, tending to mimic the bjt behavior to 2 diodes. However, I do not know how to evaluate how destructive the bjt will be to the photodiode's photocurrent resolution. In other words, how much of the collector current from the reverse-biased CB junction actually makes to the emitter.

The photodiode needs to be able to measure photocurrents in the range of (less than 100fA), and as such needs no additional currents to be injected from the collector (even though they are ~Is).

Does anyone have any data/info/advice concerning the parasitic substrate bjts of nwell (photo)diodes and their anullment w.r.t to a ring of substrate contacts?

Any help will be appreciated

-Roger

Reply to
Roger Bourne
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How about a guard ring or two driven at the same potential as the photodiode ?

Colin =^.^=

Reply to
colin

Farichild used a "wraparound" technique to kill the lateral NPN beta from the output transistors (on one end of the opamp die) to the input transistors on the other end of the die. That beta was verrry small, maybe in the region of 10e-6 but it was a killer. It has been over 30 years and i was never into design, but i think the trick was to have the power NPN surrounded with an N epi region surroundes with a P well - which added a lateral NPN. That added N epi )collector) was then tied to the substrate, therby collecting most of the (substrate) injected carriers. Do your modelling with all of the silicon - not just the photodiode (and other) parts. A lateral NPN with the collector (the ring) tied to the substrate should be modelled and connected to the photodiode, where extra collectors go to the other transistors / diodes; betas based on collector areas as well as "base" (ie: substrate) recombination losses.

I hope that i have stated this correctly, or at least well enough to give you an idea as what to try.

Reply to
Robert Baer

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