MUN5333DW1T1G surge current

Why use NPNs as high-side switches?

Single transistors seldom include ESD protection.

What's the application?

The high-side switch is the PNP half. The NPN one is a level translator from the 2.5V FPGA enable.

There will be a 600W 14V TVS, with 29V max clamp voltage during the surge. The question is what should be the value of the resistor between the TVS and the high-side collector.

A digitizer for an array of mechanical switches. The 20-50mA is the wetting current, one switch will be tested at a time in a round-robin fashion to limit the supply current.

Best regards, Piotr

Zero?

We like TPIC6595 whan we need a lot of current-sinking drivers from an FPGA. It's very rugged, controlled avalanche. You'd still need the PNPs.

There was a cool octal pull-up driver, UCN5815A, but it's unobtanium now.

Have a look at Micrel eg microchip. The have some dual tsop 's

Cheers

When the surge is negative with respect to the collector, the situation is under control: it will be clamped to 29V and the transistor can withstand 50V. If the surge is positive, the PNP will be driven into the reverse active region with sort of 5V V_EBO. I can't find the TVS forward voltage at the I_MAX and so I assumed it would be prudent to limit the I_C a bit. Indeed, zero was my initial approach, but then some afterthoughts started coming.

I love the part. FYI, you can make 8 flybacks using the TPIC6595 by modulating the OE. Works OK up to a MHz: I gave up here, maybe it still can go faster. The snubber is built-in, you just connect the transformer and call it a day.

But since a PNP per channel is one part to add to the board and the pre-biased dual is one part as well, just by connecting pins 5 and 6 you end up with a logic-level-driven high-side switch, eliminating the HV shift register from the BOM. And the board must be small, so it matters.

Best regards, Piotr