microcontroller networking

bitrex · 2019-02-16T16:21:50+00:00

What SICK man network fourteen 8-bit AVRs? The related project looks very interesting: I'm experimenting with using (smaller) clusters of 8-bitters for low-power processing/splitting a single UART input, that's sending large amounts of serial data from one input into multiple serial outputs but where not all of them might be in use at any one time, or one output needs a lot of processing done at a given time but the others aren't sending much. so you might be able to have two or more processors collaborate. Sort of like those V8s that can shut down cylinders when highway cruising and V8 power not required. I don't know yet if this will have any actual power savings/cost advantage to using one big fuck-off fast ARM to do everything but is fun to experiment with. Most ARMs don't have the required number of UARTs on board for output anyway so you'd have to buy some i2c to multi-UART bridge chips or something if you want niceities like hardware FIFO buffering and they tend to be expensive, more expensive than an 8 bitter with its own onboard UART. and they tend to come from Maxim...

Feb 16, 2019 44 Replies

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bitrex 7 years ago

I saw one commercial project where the authors had used an 8 bitter (can't recall if it was PIC or ARM) doing an entire two-oscillator "analog" synthesizer with "VCA" and digital state variable filter @ 16 bit 44.1 kHz all in the timer overflow ISR, nothing in main.

Running at 16 or 20 MHz you can do the math and see how many cycles you have, about 500, just enough on a modern 8 bit RISC arch with a hardware multiplier where most instructions are 1 clock to scan the control panel, pull a sample from a wave-table, process it, and spit it out.

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John Larkin 7 years ago

The output direction of uart bit-banging is the easy one.

John Larkin Highland Technology, Inc lunatic fringe electronics

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Jasen Betts 7 years ago

bit-bang should be fine. do the output in a timer the ISR and poll the input UART from main() (or from the same timer ISR)

If there's only one ISR jitter will be minimised.

There is no rule that says you must use the UART interrupt.

I ran a PC with a modem with a broken IRG line for years using the 1024Hz timer interrupt to service the serial port. (worked fine at 9600 baud)

the only UART-i2c bridges I've seen are slaves not masters, but I think I see what you're saying have one master and the other microcontrollers just snoop on the bus and process the bits they want.

When I tried casting out nines I made a hash of it.

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Phil Hobbs 7 years ago

We're planning a data-aggregation board with 10 UARTs, each talking to a sensor with three channels (two IR, one visible).

Details are still sketchy, but it looks like we're going to use two LPC845 Cortex M0+ MCUs. They have not only 5 UARTs apiece, but _25_ DMA channels. Each will DMA from a UART to memory, then again from memory to SSP in master mode, talking to some commodious M4, and a second M4 with a SD-card peripheral looking after data logging.

Looks like we'll use TinyFS, which resists FS corruption when power gets interrupted, and also manages wear levelling. It's also readable from Linux because there's fuse support.

Loose ends include how to manage the uplink, but its data rate is small, so probably more SSPs and DMA channels on the M0pluses, and programmed I/O on the M4.

Fun.

Cheers

Phil Hobbs

Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com

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bitrex 7 years ago

My wish is to someday be hired to design a data logger for a logging company so I could call it the "Kenny Loggins Logging Data Logger."

I'm a man of modest desires

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