Lowering oscillator voltage

I have an application that requires a frequency input of no more than

2.5Vp. Most oscillator will swing close to the rail, in this case 3.3V.

I am planning on lowering the oscillator output by adding a couple diodes in series with Vdd to the oscillator, still in spec for the device.

Any issues with this?

(10MHz)

Rich

Reply to
rich
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Not as long as the oscillator is happy at 2.5 volts. But an LDO regulator would be a more stable source than some series diodes. Or a series resistor and a 2.5 volt bandgap.

Why not use a resistive divider from the oscillator output to whatever load, and run the oscillator at 3.3?

John

Reply to
John Larkin

The Wien bridge oscillator has to include a mechanism for stabilising the oscillator amplitude, which can be at any level you like.

The late Jim Williams published at least one relevant application note

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See also AN45, fig 12.

If you don't need a particularly pure sine wave, his AN-98 offers a much less elegant solution.

I've got my own ideas on the subject, which aren't yet in a fit state to publish - e-mail me at snipped-for-privacy@ieee.org if you want to talk privately.

--
Bill Sloman, Nijmegen
Reply to
Bill Sloman

Hello, I have a design that requires a reference frequency, 10 MHz, 2.5 Vp max. Most oscilators drive the out put close to the rail, in this case 3.3V.

I am going to lower the voltage by powering the oscillator through a couple diodes, still within spec.

Anyone see a problem with this or have a better solution?

Thanks

Rich

Reply to
rich

You asked this question already, and got some good answers.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html
Reply to
Tim Wescott

The RF-land term is attenuator -- but yup, that's probably what you want to do.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html
Reply to
Tim Wescott

Use a logic level translator 3.3V-to-2.5V.

Lowering VDD may cause oscillation to quit or be unstable. ...Jim Thompson

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Reply to
Jim Thompson

Heck, 10 MHz is barely RF! I assume it's a crystal oscollator, likely a digital clock, so it will probably have fast edges. Some of the cheap XOs we buy nowadays have sub-ns edges. Two resistors can both divide down the voltage and parfectly terminate the trace; why not?

John

Reply to
John Larkin

He's asking a bunch of RF questions in other threads, so I'm assuming he's planning on using this in a radio. Hence the terminology comment.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html
Reply to
Tim Wescott

True, it may be a sine wave. I guess we'll never know.

John

Reply to
John Larkin

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thank for the answers and sorry about the double post. I was worried about the added capacitance of the resistors but John brings up a good point, the frequency is relatively low. I will try the divider, KISS right?

Rich

Reply to
rich

He's a googlie. They very seldom come back for answers - they expect them to be delivered by messenger or some such.

Cheers! Rich

Reply to
Rich Grise

If you are afraid of stray capacitances making havoc with the waveform, why not use a capacitive voltage divider ?

Reply to
upsidedown

If you want really sharp edges, you can shunt the top resistor of the divider with a small cap, maybe just a few pf.

Good Luck! Rich

Reply to
Rich Grise

No d.c. path, and possibly worse loading on the waveform.

Resistive dividers are very very good--they work at GHz. Could add a speedup cap across the top resistor to compensate minor loading, in theory, but if there's enough stray capacitance to ruin a divided

10MHz clock, someting's wong.

The OP could also use one of those single-gate jobs as a buffer, running on 2.5v. If it's digital waveform, that is. He never said.

-- Cheers, James Arthur

Reply to
dagmargoodboat

James, Thanks for the useful information, the buffer is a good idea but this signal feeds a pll.

Thanks again and thanks again to those who provided helpful advice.

Rich

Reply to
rich

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