Interesting TIA design

Ok, yeah, mine also end up with those large blobs of solder when done by Weller. The Kester No-Clean 15mils is the smallest diameter solder with decent behavior that I could find. Does anyone know smaller stuff?

grid.

The problem with no-clean solder is that it's so hard to clean.

John

As long as she's hasn't done much programming, particularly in C, she has a shot. If she has, forget it. Her brain is already fried.

No programming at all. I was explaining to her, at the bar at Zuni, how programmers execute a line of code at a time. And then I said, imagine that you're looking at a scene full of still objects. When you blink your eyes, a clock ticks, and when you open them again everything has moved, all at once. That's synchronous logic. She said "sure." So there's hope.

John

Good explanation (though I think I would have used a disco strobe as an example ;). Don't teach her about "delta cycles" until she has the basics down. When they teach VHDL they usually start with that stuff and many never get over it. ...then they totally gloss over libraries. Grrr!

I had a really good introduction to VHDL book once, but it grew legs. It came from the synthesis angle and showed examples standard logic elements that were really good templates to use to direct the synthesis tools. Unfortunately the book grew legs. I use Ashenden as a reference but it really isn't any good for such things and I would never spring it on a newb.

Title? Author? ISBN? I'd like to learn to do some simple synthesis so I don't have to bug a very busy associate. ...Jim Thompson

-- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at

I won't, because I have no idea what a delta cycle is.

When they teach VHDL they usually start with that stuff

I don't do VHDL. R does that for me. I just tell him what I want.

John

I wish I had it. :-( I'll try to do an Amazon search for it. It was a fairly short book but really good for synthesis stuff. The hard parts of VHDL are the parts not used for synthesis.

It's an important concept (one you'd say, "so?") but it just confuses things unnecessarily.

Sure. You've said as much.

John Larkin a écrit :

grid.

That's why it's named that way. You can't clean it...

not

grid.

Not really true, there have been numerous articles published on cleaning no-clean with aqueous cleaners, it is done routinely. No-clean flux is so named because when it is processed exactly right (automation required) there are no highly reactive components left in the flux residue. When not cleaned it is suitable for non-critical consumer stuff expected to operate in benign environments only; for all other applications, especially anything that must withstand any moisture, or when used for manual soldering (where complete deactivation cannot be achieved), it *must* be cleaned for any kind of reliability.

It's a bicycle:

;-)

It's really VHDL's way of keeping everything from happening at once, while letting it happen at the same time. ;-)

Clock skew is nature's way...

John

Except that clock skew doesn't happen at the same time (i.e. you can measure it).

And then they change the process on you, about six months into production ...

Clock skew cuts into Vmax so, at least FPGA manufacturers, don't make it worse. Lower skew doesn't matter. Fortunately, lower is the natural tendency too. ;-)