how to use 74hc74

anyone have a schematic how to use 74hc74... i cant make it work...tnx

Reply to
iceman
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work...tnx

How do. First, and always, download the data sheet and read it. Here's a link:

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You've gotten a lot of good advice here, and you should follow it. Beginners' mistakes include:

  • First and foremost, check the device pinouts. Most beginner problems come from plain and simple wiring it up wrong. After that...

  • Take a look in the data sheet at the "setup time". That means the data has to be present and stable for a period of time before you clock. In the data sheet, it's specified as 20ns. That's not negotiable.

  • Like most clocked circuits, you have to make sure you have a good clock signal with fast rise and fall times. You also have to make sure it's debounced. You can't have slow rise times here. The same thing is true for the preset and clear inputs.

  • Check your layout. Clocked logic shouldn't have long lines which are susceptible to noise pickup. Use buffers like the 74HC04 to accept inputs from off the board. Also, you might want to poke around a little bit -- coupling between signal lines could result in false signals at inputs which can mess things up. Just moving a wire a quarter inch away from another wire can sometimes reduce coupling enough to make a spurious signal disappear.

  • Check your wiring again. Try to remember if you changed anything that was wrong. You may have smoked the device before.

By the way, questions of this type usually get a better response on sci.electronics.basics.

Good luck Chris

Reply to
Chris

Make sure you have a bypass capacitor between VCC and GND, and don't leave any input pins unconnected.

Tam

Reply to
Tam/WB2TT

"iceman" wrote

Why don't you just show us your schematic? Do you have the /S and /R pins tied high? If they are both low, the Q outputs will both be high. If either is a logic low, then the Q outputs will reflect that. Otherwise if the /S and /R pins are both high, the D input will clock to the Q and /Q outputs on the rising edge of a clock signal. What are you trying to do that is not working?

Reply to
Anthony Fremont

One must have some kind of pinout to attempt to try, to be able to say it doesnt work. Id suggest that since its an HC device, it may already have been zapped by static/ESD and should now be used for artwork.

Try to find the 74S74, or the AS type, the HC is hypersensitive to static

Reply to
Bradley1234

The 7474 is (IIRC) a single D flip flop. Do you understand the different sorts of flip flop? A D flip flop latches the information on the D input to the Q output on an active transition of the clock input. If you wanted to make it divide by 2 you connect the ~Q (Q_bar) output to the D input. the output will change state for each transtion of the clock in the active direction (ie rising or falling).

As other posters have pointed out, make sure you have a clean clock signal, that the chip is decoupled and that the set and reset input are tied to the correct logic level.

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Jim Backus OS/2 user since 1994
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Jim Backus

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