Help with simple circuit please

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I've posted a new schematic and a circuit description for you at abse 
under "Dialer timer". 

>Many thanks for taking the time to help us out with this!

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Sorry, no. 

I tried emailing it to you, but your ISP refused it. 

What next?

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Sorry, no. 

I tried emailing it to you, but your ISP refused it. 

What next?

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Here: 

http://s1339.photobucket.com/albums/o704/jfieldsataustinintrumentsdotcom/?action=view&current=DialerTimer3_zps6595ce04.jpg

Here's how it works:

First, there are two modes of operation: daylight mode, which is entered if the mains failure occurs during the day, and night mode, if the failure occurs at night.

U1 is a 7555 timer configured as an astable multivibrator, and it generates 1MHz square waves used as clocks for the simulation; in real life it would output 1Hz clocks.

S1 and S2 simulate a mains operated form "C" (SPDT) relay with the NC contact connected to GND and the NO contact connected to +12. Thus, when the mains is hot, the NO contact will made, forcing RST high and resetting the circuit. If the mains should fail, however, the armature will be released and the NO contact will be made, forcing RST low and de-asserting the reset.

Assuming daylight mode, U5+ will have gone more positive than U5-, forcing U5's output and U6A's PREset input high, which will also force U6A-Q, U6B-D, and one of U3D's inputs high.

In the meantime, RST's having been high had disabled U2 by keeping it in reset mode, but RST's going low when the mains failed forced U2 out of reset, allowing it to count up.

U2 is used as a 2 hour timer for this application, and by accumulating

1 second clocks from U1, will reach 2 hours when it counts up to 7200. 7200 in Hexadecimal is 1C20, which in binary is 0001 1100 0010 0000.

U2 is a 14 stage ripple counter, and its outputs map to binary 7200 like this:

Q14 Q13 Q12 Q11 Q10 Q09 Q08 Q07 Q06 Q05 Q04 Q01

0 1 1 1 0 0 0 0 1 0 0 0 .

That means that when the count has reached 7200, Q13,Q12,Q11, and Q6 will be high and all the other outputs will be low.

U3A, U3B, and U3C are used to decode the output data from the counter, with the output of U3C going high when the count reaches 7200.

When that happens,the output of U4C will go low, forcing U1 into reset and stopping the clocks.

Also, remembering that we're working in daylight mode and that since U6B-D is being held high, when U3C goes high it'll be used as the clock input of U6B which will force U6B-Qbar permanently low until the mains is restored and RST is once again asserted.

The falling edge of U6B-Qbar is differentiated by C3 and used as a low-going trigger for U7, a 7555 timer used as a one-shot to provide an output to the dialer.

In night mode, RST will go low when a mains failure occurs, but U5's output will be low because no light has yet been detected. RST going low at one of U4B's inputs forces U2's reset input low, allowing U2 to count. as before, U2 will count up to 7200, but since it's dark out we want to postpone the output to the dialer for 2 hours after first light.

To do so, the counter's output is again decoded at 7200 clocks, inverted by U4C, and sent to U1's reset input which will stop the clock.

The circuit will remain in this condition until first light is detected and U6A-Q goes high.

Since stopping the clock has kept the counter's outputs at 7200 binary, U3C's output will remain high and U6A-Q going high will cause U3D to go high. That high-going edge will be differentiated by C1 and used to reset U2.

When that happens, U3C's outputs will all go low, as will the output of the decoder, forcing U4C's output high, enabling U1, allowing it to start making clocks.

U2 will now start counting clocks again and when it gets to 7200 will cause U1 to be reset, stopping the clocks, and also sent to the clock input of U6B.

Now, since U6A-Q is high because first light has been detected, when the clock input of U6B goes high U6B-Qbar will go low, triggering U7 and providing an output for the dialer.

So, in summary:

Daylight mode causes the counter to count to 7200 once and then trigger the one-shot.

Night mode causes the counter to count to 7200, then freeze until first light is detected when it'll be reset and will count to

7200 again before triggering the one-shot.

--
JF

Here's how it works:

First, there are two modes of operation: daylight mode, which is entered if the mains failure occurs during the day, and night mode, if the failure occurs at night.

U1 is a 7555 timer configured as an astable multivibrator, and it generates 1MHz square waves used as clocks for the simulation; in real life it would output 1Hz clocks.

S1 and S2 simulate a mains operated form "C" (SPDT) relay with the NC contact connected to GND and the NO contact connected to +12. Thus, when the mains is hot, the NO contact will made, forcing RST high and resetting the circuit. If the mains should fail, however, the armature will be released and the NO contact will be made, forcing RST low and de-asserting the reset.

Assuming daylight mode, U5+ will have gone more positive than U5-, forcing U5's output and U6A's PREset input high, which will also force U6A-Q, U6B-D, and one of U3D's inputs high.

In the meantime, RST's having been high had disabled U2 by keeping it in reset mode, but RST's going low when the mains failed forced U2 out of reset, allowing it to count up.

U2 is used as a 2 hour timer for this application, and by accumulating

1 second clocks from U1, will reach 2 hours when it counts up to 7200. 7200 in Hexadecimal is 1C20, which in binary is 0001 1100 0010 0000.

U2 is a 14 stage ripple counter, and its outputs map to binary 7200 like this:

Q14 Q13 Q12 Q11 Q10 Q09 Q08 Q07 Q06 Q05 Q04 Q01

0 1 1 1 0 0 0 0 1 0 0 0 .

That means that when the count has reached 7200, Q13,Q12,Q11, and Q6 will be high and all the other outputs will be low.

U3A, U3B, and U3C are used to decode the output data from the counter, with the output of U3C going high when the count reaches 7200.

When that happens,the output of U4C will go low, forcing U1 into reset and stopping the clocks.

Also, remembering that we're working in daylight mode and that since U6B-D is being held high, when U3C goes high it'll be used as the clock input of U6B which will force U6B-Qbar permanently low until the mains is restored and RST is once again asserted.

The falling edge of U6B-Qbar is differentiated by C3 and used as a low-going trigger for U7, a 7555 timer used as a one-shot to provide an output to the dialer.

In night mode, RST will go low when a mains failure occurs, but U5's output will be low because no light has yet been detected. RST going low at one of U4B's inputs forces U2's reset input low, allowing U2 to count. as before, U2 will count up to 7200, but since it's dark out we want to postpone the output to the dialer for 2 hours after first light.

To do so, the counter's output is again decoded at 7200 clocks, inverted by U4C, and sent to U1's reset input which will stop the clock.

The circuit will remain in this condition until first light is detected and U6A-Q goes high.

Since stopping the clock has kept the counter's outputs at 7200 binary, U3C's output will remain high and U6A-Q going high will cause U3D to go high. That high-going edge will be differentiated by C1 and used to reset U2.

When that happens, U3C's outputs will all go low, as will the output of the decoder, forcing U4C's output high, enabling U1, allowing it to start making clocks.

U2 will now start counting clocks again and when it gets to 7200 will cause U1 to be reset, stopping the clocks, and also sent to the clock input of U6B.

Now, since U6A-Q is high because first light has been detected, when the clock input of U6B goes high U6B-Qbar will go low, triggering U7 and providing an output for the dialer.

So, in summary:

Daylight mode causes the counter to count to 7200 once and then trigger the one-shot.

Night mode causes the counter to count to 7200, then freeze until first light is detected when it'll be reset and will count to

7200 again before triggering the one-shot.

--
JF 

Thanks very much John! 
I will have a look though the description and have a play with ltspice  
today...its well beyond my design skills! 

Thanks again 

Steve

You will need some hysteresis around the "first light sensor", U5. The set and reset inputs of the CD4013 (U6A) do not like slow moving signals.

--- Since the specs for the rising edge rates of SET and RESET are only relevant when the time between SET or RESET and Q or Qbar is important, the edge rate of U5's output doesn't matter.

What does matter is that at some point along U5's 0 to 12V output, U6A will be forced to latch, and when that happens U6A will stay latched until the mains goes hot.

-- JF

Wow, you really put in a lot of extra effort to post it there as well as ABSE.

Nice. As usual, from you. :-)

Ed

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That's very kind.  Thank you!

--- Since the specs for the rising edge rates of SET and RESET are only relevant when the time between SET or RESET and Q or Qbar is important, the edge rate of U5's output doesn't matter.

What does matter is that at some point along U5's 0 to 12V output, U6A will be forced to latch, and when that happens U6A will stay latched until the mains goes hot.

-- JF

Hi John. What LDR do you recommend for the daytime detection V4?

Cheers!

Steve

I know what you are saying; I have been bit by the problem before. You need a sharp rising signal on set/reset. Bread board it! If it does not work put the hysteresis in.

--- I'd use something like this:

Which has a dark resistance of about 150k and a 10 lux resistance of somewhere between 4 and 11k.

The circuit should look like this: (View with a fixed-pitch font)

.+12V>--+-----+-----+------+ +-|+\ . | | | | | | >-+ . [10k] [LDR] | [10K] +-|-/ | . | | | | |SPARE | . | +-----|-[1M]-+ +------+ . | | | | | . | +----|+\ | GND . | | | >----+-->OUT . +-----|----|-/1/2LM393 . | | | . [10k] [50k]---+-----+-----+--------->GND

In order to have it trigger at what you want "first light" to be, locate the circuit where it'll live and so that the LDR is exposed to outdoor ambient light, then adjust the pot so that the wiper is at the grounded end of the element.

Next, wait until first light and then adjust the pot until the comparator's output just goes high.

That's it...

-- JF

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Oops... 

Should read: ..."then adjust the pot so that the wiper is opposite the 
grounded end of the element.

--
Oops... 

Should read: ..."then adjust the pot so that the wiper is opposite the 
grounded end of the element.

--
Oops... 

Should read: ..."then adjust the pot so that the wiper is opposite the 
grounded end of the element.

--
Oops... 

Should read: ..."then adjust the pot so that the wiper is opposite the 
grounded end of the element.

--- You shouldn't have to do any of that if you've got your newsreader configured to display incoming posts in a fixed pitch font.

There's also a problem in that your newsreader isn't quoting properly, making it impossible to reply to you without some really inconvenient machinations on my end.

---

--- Yes, of course, but you should learn how to read pictures before asking someone to waste a thousand words.

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--- No manufacturer? No data sheet? Question marks after the important specs?

I sure wouldn't go for it.

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--- OK, if what you mean is the entire detector circuit.

---

--- One bridge at a time...

-- JF

You know, I have seen this "view with a fixed pitch font" from you several times in the past, and in reflection each time was when you were posting a circuit or a fix for someone.

So, essentially, Larkin is full of shit. You have been a greater contributor to the group both in the spirit of the industry and the spirit of the group topic.

He magically lost track of the circuits I posted too, but keeps claiming I have never posted any, and keeps asking for more.

Don't know who put the burr under his saddle, but folks here seem to bear the brunt of the resultant effect of his bent affect.

Reminds me of Rodney King. May he rest in piece. The idiots gave Arafat the Nobel Prize that year.