I'll be praying to the Electron God that I don't have to do something like that :) It's interesting how involved some designs are to control arcing and corona. D from BC
I'll be praying to the Electron God that I don't have to do something like that :) It's interesting how involved some designs are to control arcing and corona. D from BC
"D from BC" skrev i en meddelelse news: snipped-for-privacy@4ax.com...
"Somewhere" .... What kind of weak crap is that? The burn mark is flaming obvious!
EN 60950 sez: 2 - 4 mm creapage distance, 2 mm for FR4 fiber-glass boards and the 4 mm for paper-board (the brown stuff).
Nah - your "about" is what kills: there is likely a needle on your 300Vpk going to maybe 600 V?
Why worry about third-order effects if you do not care enough about 1'st order to describe/measure?
Ohhh..nooo.. I've seen it done but just didn't think of it. My pcb work is getting trashier by the post. :(...
D from BC
That's a little disturbing to know when I'm trying out pcb design for about double the voltage and about 12 000 times the frequency.
It was probably unwise for me to make a prototype with a high pcb density at voltages and frequencies I'm not familiar with. Risky... D from BC
I took a look on digikey..
The STP4N150 N channel mosfet has a 1500V rating in the TO-220 (pitch ~0.1").
This suggests the spacing is good at any frequency (without heat burn out) up to 1500V switching.
I've seen many mosfet datasheets and never seen anything like.. "Do not switch 1500V beyond 1Mhz or increased risk of pin to pin arcing." D from BC
The oval pad layout, and the term for the lead bending is SPLAYED leads.
No clean is very bad (solids or not) for Medium and High Voltage designs.
It's not obvious so far where the arc occurred. I saw it.. I heard it, but it was so quick I can only say it's within a square centimeter. I have to remove some parts that are in the way to get a closer with a magnifying glass. I'm not sure but I think I see tiny holes in big SMD power resistor. Hot spots?
I put a 2A fuse on the bulk capacitor (200uF charged to line peak about 170V). Without it, I think I'd have obvious destruction.
recti >----+-----2A fuse--->to smps | 200uf,200V | | com
It's been suggested in other posts, that my design could be "spiking" beyond expected and could start an arc. Perhaps an unexpected spike beyond 300V (my design is supposed to work without snubbers) across a flux gobbed 20mil gap provided conditions for an arc. That or an SMD part failed with an arcing effect.
Besides...I should practice including creepage distances in my pcb artwork. Which I'm just learning about.
2 mm creepage... Does that mean a 2mm distance between two parallel traces (top side) on a FR4 pcb for 300V 700khz. Or is that the spacing between top side and bottom side traces for 300V 700khz? D from BC
It's getting a cleaning next time.
If only I had a no clean residue spice model :) Everything works so nice in spice..
Well.. I have to work on adjustments to the pcb design with corona/creepage eyes.
It would be cool if PCB layout software knew what voltages exist and warned me of broken creepage/corona rules. D from BC
Definition of creepage is "the shortest distance along a surface of an insulating material between two conductive parts. " It doesn't matter if the conductive parts are parallel traces or just IC pads or any other copper feature (like ground fills). Its the shortest distance, regardless of the path.
Creepage distance for a top/bottom pair is usually pretty long, because the path is to the outer edge of the PCB, down the thickness of the board and back across to the other conductor. An .060 board already gives you ~1.5 mm vertically. In the earlier posts regarding slots , its assumed the worst case problems occur on a common surface, and the creepage path is then around the edge of the slot. Beware that the IEC creepage distance rules say that if the slots are too narrow - they can't be considered in total distance. I forget what the actual slot width is before they are considered effective.
Steve
After picking at the board for awhile here's the results:
A dampening resistor (Cuk smps design) SMD 2512 1W thick film resistor burned open. There's 101 printed on the resistor chip.. The 0 is barely visible from the heat damage.
In spice.. If this resistor burns open, the smps goes out of control and any gaps in the resistor gets 400Vpeak oscillating at 7khz..
Hey..that's probably the sound I heard and the arc I saw.
I know this resistor does get hit hard by a short impulse current upon start up.. It's a pita to simulate due lots of other parts that form the smps power up surge profile. Most likely I goofed picking this part.
Anyways.. from all the posts I learned that my pcb artwork needs to respect corona and creepage and a flux free pcb can help too. :)
D from BC
I'll go out on a limb and suggest that the more likely failure scenario is something like this (rather than HV breakdown of anything per se): loop instability --> power overload --> cracking of conductors and/or insulation --> arcing --> cascading component failures
Of course, it's always best to insure that voltage spikes are kept to safe levels, but primarily to avoid component breakdowns rather than arcing or corona, that is, until the voltages involved get sufficiently high for corona. The highest voltage I see mentioned was
+/-300V, and let's double that to allow for some spiking. At 600V, I wouldn't expect arcing, unless your spacing is really small, and I wouldn't expect flux to cause problems, either. Again, I propose the above failure scenario as more likely.I suggest you get a good handle on your loop stability or else damp it way down until you've had a chance to take care of all the little transients, properly snubbing them or minimizing the parasitics that cause them. Then, if you're using current feedback, make sure that your control circuit is getting a clean trapezoid that doesn't get sampled until after the initial switching transient subsides. Make sure slope compensation is adequate. Then, you can begin to take steps to speed up the loop. Paul Mathews
I found a blown power chip resistor. I think I got the impulse power handling wrong and chose an underrated resistor. It burned out and arced. Fooled me.
I'm going to replace the resistor with something impossible to burn out just to continue testing. I'm sure there's more bugs.. Always is with loose cannon design :)
I am using current feedback but my control doesn't use blanking. I think it's called that. Blanking to make sure that the feedback current control doesn't respond to the switching transient. The blanking is a delay function. It's like the feedback is suspended until the blanking time passes.
My smps design works great in spice without blanking but I haven't modeled everything and I'm still suspicious.
I tried throwing a wrench in the gears.... In spice, the smps loses control with inductors with severe interwinding capacitance (Cuk topo). The transients mess up the feedback. A blanking function would fix that. But, I'm not using inductors like that.
I'll be checking everything that you listed. It's all good stuff :)
D from BC
You can add some 'blanking' time by paralleling the current sense resistor with a fairly large capacitance (needed because Rsense is quite small) and/or adding an RC filter to the current sense input. This will affect the minimum load for stability (increase it), but the undesirable transient also has that effect. It's easy to add some capacitance to your Spice model to generate the switch-on transient that is the bane of current feedback designs. Think about it. Rectifier reverse recovery characteristics, leakage inductance and layout inductance (loop area), and switch turn-on time are all important determiners of this type of problem. Paul Mathews
I think you're saying, assume the worst... :)
Yup...thought about RC filtering too.. But just the minimal amount to help out the following circuits I use which also help reduce reaction to spikes.
I can easily make a blanking circuit but RC filtering is easier to add to an existing prototype pcb.
Simply:
/\\/\\/\\/\\/\\/\\/ spice signal for current feedback
| | | | | | /|\\|/|\\|/|\\|/ | | | | | | real world for current feedback (spikes and ringing) D from BC
You need to add a 3rd picture, which is between the other two in amplitude and relabel them as follows:
Spice (least amplitude) As seen by control chip (medium amplitude) As seen by oscilloscope (highest ampliltude) that you're calling 'real world'
This is because it's difficult to setup a scope probe that doesn't add to the spike amplitudes. One thing that helps quite a bit sometimes: wind several turns of the scope coax through a large ferrite toroid or clamp-on core to improve scope CMRR. Always check what you get when you 'short' the probe tip using probe ground (whatever you're using). Paul Mathews
The word for today is Tranzorb.
Sounds easier than my other idea.... I have a 17Mhz analog optoisolator IC I got from Digikey.. It's a HCPL-4562-000E
Late at night, by candle light, D from BC penned this immortal opus:
Yikes, that's ~0.5 mm. Still below 1 kV/mm but much too close for comfort. I suggest something like 80 mil minimum for that kind of voltage.
I've seen a PCB burned up by 150 V on traces separated by 3 mm (~120 mil). It was phenolic, and got dirty, humid, whatever. The leakage heated the PCB at some spot and then the charring made it increasingly worse. Burned it through for the whole length the traces ran together.
- YD.
I might spray the board to prevent arc over due to junk landing on the pcb.. (The pcb is not in a sealed box.) Perhaps something from a paint store might be a cheap and convenient solution.. Let's see... polyurethane acrylic lacquer high heat engine clear coat
I wonder which one to use... D from BC
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