1. Home
  2. Electronics Design
  3. Dual-Slope Converter Re-invented
  4. Page 2

Dual-Slope Converter Re-invented

I should have said it is immune to DA assuming a sufficiently long measurement interval.

The integrator integrates any error between the long term average of the PWM, and the long term average of the input signal. Feedback stops this error growing indefinitely, so if you measure the PWM over a sufficiently long period no error can accumulate. DA can only introduce a temporary error.

Sorry I meant DA :)

Yes, or you can use just one non-inverting schmitt alone. The problem is the logic-type schmitts have supply current variations as the inputs pass through their deadband. This translates to supply voltage ripple synchronous with the circuit operation, which contributes quite a large error (e.g. several hundred ppm). It is surprisingly hard to filter it out too. U1 is a AUP low power type which has minimal current ripple, U2 is a high speed type with low output driver resistance (hence low mismatch between high and low state driver resistance).

There are some CMOS switches with matched channels, e.g ISL43L210 has

2mOhm matching. These would be good to try.

But James Arthur posted a bootstrap circuit which eliminates both the supply ripple and the driver resistance mismatch errors.

[...] 
--

John Devereux
Reply to
John Devereux
Loading thread data ...

They both have integrators and comparators, true.

A delta-sigma converter works by making a decision at each clock cycle, and dithering the comparator output fast fast fast.

A dual-slope converter works as the article describes: the integrator output climbs at a slope proportional to the input voltage, then descends at a constant slope. (Didja see the two slopes?) If everything is done right, the amount of time it takes to descend is a close analog of the input voltage.

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

I meant DA. It was TWC, Typing Without Coffee.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

Done. The author has now been congratulated on his he-invention of the wheel.

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

The resemblance ends there though.

A dual-slope converter normally uses a common clock to time the integration of the unknown and the (de) integration of the reference. The same RC is also used on the integrator, so given stability of RC and clock *over a conversion cycle* (a pretty weak constraint), the value of the RC and the clock frequency all cancel out and thus don't affect the results.

The circuit that was presented uses an RC-timed monostable (RosCos) to time the integration (rather short, at 26usec, especially given a slow

4.5MHz op-amp), and it's integrated through about 113K to yield a fairly small swing of about 1.1V max at the integrator output. The reference (de) integrate uses the same Cint, but the resistor is about 100K. The output is assumed to be timed with an entirely different (presumably crystal) clock.

The author correctly identifies the S1 switch resistance variation as a source of linearity error (temperature dependent, too). The load on the input is kind of nasty with current flowing out of the input and a variable-time-switched loading. For want of a buffer..

The reference is the supply rail, which means that changes (or noise, wrt to the monostable trigger point) will affect the output.

I'd guess stability to be in the 8-bit or 10 bit range. Linearity error due to the integrating cap soakage should not be a big deal- maybe ~0.01% if it's well chosen, but there are other sources of linearity error.

And there's that 'hung' state that requires a firmware timeout to deal with reliably.

Frankly, a 12-bit on-chip SAR is a better choice in most cases, or even a decent 10-bit with oversampling.

I have many times designed my own ADCs for controllers, because we wanted ~16 bit resolution but needed only 11 or 12 bit linearity and stability. It was also an easy way to get a 50/60Hz mains frequency notch in the response by integrating for st like 100msec. I might do it in a 2013+ design in appropriate circumstances, but that window is constantly shrinking, what with very-low-cost high-res delta sigmas available for quite reasonable prices to serve high volume markets such as load cell scales. Best regards,

--sp

Reply to
Spehro Pefhany

Soakage in your condenser.

Reply to
Spehro Pefhany

Got it, Thanks again. I'll have to go back and look at James's circuit. (You guys are all way to clever for me lots of times....)

George H.

Reply to
George Herold

Nice, thanks Spehro. Have your hands been properly 'washed' now?

George H.

Reply to
George Herold

Yup, that did it. ;-)

--sp

Reply to
Spehro Pefhany

I'm pretty sure that by the time you have a decent cap, the op-amp, and the requisite handful of resistors on the board, you will have used up enough space and $$ to toss an ADC on there.

As you said, the window is constantly shrinking...

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

Hey, If a 'decent cap' is an npo ceramic then that's not too big. (I know, I'm on the trailing edge of technology... I've been using ceramics to replace all the low dissipation film caps that are going away.) The nice thing about making your own, is that ya'know all it's foibles. And it's lots more fun!

George H.

Reply to
George Herold

They aren't all going away--the newish polyphenylene sulphide ones are actually pretty good. PEN, not so much.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Hi, George -

See if this is any good to you...

formatting link

John S

Reply to
John S

There is a table of caps and DA here:

formatting link

Reply to
John S

Thanks John, I think I've read that. I have a nice graph by B. Pease showing dissipation factor as a function of frequency for various caps. The new npo ceramics are much better than the old ones in that regard.

Reply to
George Herold

r
l

le,

r
a

and

of

he

o
w

rly

e
a

he

or

l

en

it

ch

d

hat are going away.)

Hmm OK a quick troll of digikey finds this, from panasonic.

formatting link
HS(Z).pdf

0.3% dissipation is OK.. but not great. We've got a few high Q circuits th at could use even lower dissipation. (Q's approaching 100.) The few cera mics that I've tested were a bit better than the (0.1% dissipation) polypr opylenes that they were replacing.

George H. (I've spent a fair 'slug' of time starring at cap data sheets.)

Reply to
George Herold

I've been using the chip NPO's in my stuff. You can get them up to 100nF without significant cost penalty, bigger if you pay a bit. Definitely much better in these sort of circuits (integrators) than X7R.

--

John Devereux
Reply to
John Devereux

For anyone who's interested, I found a PDF of the entire contents of Bob's old National website, including 23 Electronics Design articles and a bunch of other stuff. It isn't brilliantly paginated, but I think it's all there--like 340 pages of it.

formatting link

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Thanks! ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

I must be missing something. Isn't D = 1/Q? That would be a D of .01 which is 1%, yes? And that is worse than the .3% you found. No?

John S

Reply to
John S

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.