Determine switching frequency of photocoupler

Your load resistor is much too high.

The data sheet - at

specifies the 4usec typical 18usec maximum rise and fall times with a

100R load resistor and a 2mA current - thus at a voltage swing of 0.2V. The capacitance and the Miller capacitance of the output transistor is obviously pretty high, which is common in cheap opto-couplers. Typically they use a Darlington-connected pair to boost the output current.

You can get much faster opto-couplers. The Agilent HCPL-2400 - for which they claim 40 MBd operation - has been around for many years. Back around 1984 we had a bunch of these on a board to isolate a 12-bit wide parallel bus, operating at rates of up to 10MHz.

I got stuck with the job of getting the link to work again after some idiot in marketing had promised the customer that he could stick 18 meters of ribbon cable between the TTL drivers and the board carrying the opto-couplers, and was able to rework the boards so that we guarantee that the system would work with worst-case tolerance components over the full commercial temperature range.

A few years later, one of the boards did stop working properly when it got hot, but the offending HCPL-2400 didn't match the data sheet and was sent back to the Agilent (then Hewlett-Packard) Quality Control department. Dropping a new part into the socket solved the problem.

Farnell also list "high speed"opto couplers from Infineon, who only claim 5MBd operation for their "logic output" parts, which are even more expensive than the Agilent parts, at about $7 in small quantities. I've never had an opportunity to play with them.

------------------ Bill Sloman, Nijmegen

(snip) This coupler has no external connection to the photo transistor base, so you have no way of bleeding the stored charge from the base to trade off transfer current gain for speed. The best you can do is to load the transistor with a low value of load resistance.

But even as low as 1k, the total of rise, fall, storage and delay times amounts to about 24+24+2.2+6us=56.2us The frequency that just allows time for all that is 17.8kHz. That doesn't leave much more for signal swing at 10kHz, but you might just get away with it.

The key to pushing the speed involves minimizing the voltage change across the photo transistor, so that the internal capacitances are hardly involved. You might connect this transistor between the 12 volt supply and the base of another transistor, with the emitter of that transistor at zero, and a low value resistor between base and emitter. That way, the photo transistor has only to produce a .6 volt swing or so to switch the second transistor. An even faster circuit uses the photo transistor as one side of a differential amplifier pair (or uses two of the photo transistors with their LEDs driven alternately). But you still need additional parts to produce a 12 volt swing. Probably the simplest would involve a comparator.

If you look for a substitute device, look for one that brings the base of the photo transistor out to a pin, so you can load the base to emitter with a resistor. That will shorten both the storage and fall time quite a bit, while slightly slowing the delay and rise times. It will also lower the current that can be switched by the photo transistor, so you may still need the second transistor.

You can also change to an internally shielded logic driver output type coupler, since these generally have much faster switching speeds.

On 17 Aug 2005 13:07:23 -0700, "Andrew" wroth:

Use two of the couplers. Invert the drive signal so that you have two phases 180 degrees apart. Use a 200 ohm resistor between each drive phase and the input diode on each coupler. Connect the two outputs in series between the

12 volt supply and ground. Take your output from the common connection between the couplers. This is called a "totem pole" connection.

Somebody will probably try to warn you about "shoot-through glitches". Since the output switches are current limited, there will be no glitches.

Jim

Nice suggestions- but add a little non-linearity and that part will easily handle 10KHz...even allowing for 5nF Ciss on that monstrous MOSFET. View in a fixed-width font such as Courier.

. . +12V . | . -------- +------+------+ . | | | | . LOGIC | | | | . IN | | / / . --- -------- 10K 1K . / / . MOSFET -> | ON | OFF | \\ 10V \\ . | zener | . | / | . +--/\\/\\--+--------+ +-----|>|-----+-----> GATE . | 220 | | | / | . | / | | 1N5240B | . | 2.2K | | c | . | / | | |/ . | \\ | +-----|>|---|2N3904 . | 0.022U | | PC3Q67Q | 1N4148 |\\ MOSFET . +---||---+ --| - O.C.- c - e . | | --- |/ | | . c | / \\ ~ ~ ~ | | | | . 4.7K |/ | --- |\\ | | . LOGIC>-+--/\\/\\-+-|2N3904 ---|--------- e - | . INPUT | | |\\ | | | . +--||---+ e +5V +------+------+-----> SOURCE . 100p | | . --- 12V COM . /// . .

But for a PWM app- he can expect something like +/-20% deviation about

50% duty cycle- may or may not be so good to use in that respect...

Thanks for all your posts. I was hoping to find a direct 16 pin smd replacement that would work (or change load resistor), but it seems that a redesign is needed.

It is not imperative that logic side and 12V side remain isolated, so with that in mind, would I be better off (speed wise) just to use regular transistors instead of an optocoupler?

Also, John, would you mind telling me how you calculated the rise, fall, storage, and delay times you posted?

Fred, your redesign seems to make some sense, but if you wouldn't mind taking a few minutes to explain what the parts do and why, I would appreciate it! I can figure out alot of it, but some of it I'm not quite sure why it is necessary, and I don't like to utilize designs without knowing the "why" behind them.

Thanks again guys!

Thanks John, I wasn't familiar with how to read that graph and that the values stacked, but now I see exactly what you mean.

Any thoughts on using a regular transistor instead of an optocoupler in order to boost speed?

I read the data off the data sheet graph. By the way, all those times refer to saturated switching. If you use the coupler in an analog design (LED always on, but varying in intensity, transistor always on, but varying in conduction, followed by a comparator or other i bit A/D converter), none of those times apply, directly. The linear process is much faster than saturated switching.

As long as the grounds don't have to be isolated, then that's the logical thing to do.

Good Luck! Rich

If there is no reason for isolation, then you don't need it. Ideally, you have a common-emitter transistor amplifier, base driven by phototransistor current source, and nonlinear negative feedback through the zener diode. Negative feedback generally means a portion of the output is fed back to oppose an input signal causing the output to change. But since the zener only conducts at the end operating points of Vce=0.6V and Vce=10V, there is no negative feedback while the transistor is transitioning between those two operating points, making the transition fast(er). When the phototransistor is off, the 10K resistor supplies enough current to the transistor base to drive it to operating point Vce=0.6V. When the phototransistor is turned on, it will shunt the

10K resistor current away from the base causing the transistor to conduct less so that Vce rises. Vce continues to rise until the zener diode conducts reverse current into the phototransistor collector of large enough magnitude to prevent the phototransistor from saturating. The output then stabilizes at the Vce high point where the sum of zener and 10K resistor currents equals the phototransistor sink current. You can figure out what happens when the phototransistor turns off. In each steady state operating point condition, the junction of zener anode, 10K resistor, and phototransistor collector, remains at ~1.3V, and this makes for fastest phototransistor speed.

Nope- the test circuit was a 100 ohm resistor, 2V collector supply, and

2mA collector current switching. They have another graph showing the four tx's as a function of collector resistance under same conditions. The worst is td, the delay time, and this accounts for time it takes that weak photon controlled Icbo to charge the b-e junction to 0.6V or so. ts corresponds to base saturation charge bleed down into active region, tf and tr have usual meaning.

The only problem there is an 8:1 variation in CTR at any fixed current in the usable range of 1ma to 10ma. It seemed easier to reduce td by injecting a large transient current into the diode.

View in a fixed-width font such as Courier.

. . . ------ . | | . LOGIC | | . IN | | . --- -------- . . MOSFET -> | OFF | ON | . . +12V . | . +------------+-------+ . | c | . / |/ | . 2.2K +--|2N4401 === . / | |\\ 0.1u . \\ | e | . | | | | . +-------+ +---------------> GATE . | | | | . c | e | . 4.7K |/ | |/ | MOSFET . LOGIC>-+--/\\/\\-+-|2N4401 +--|2N4403 | . INPUT | | |\\ |\\ | . +--||---+ e c | . 100p | | | . +------------+-------+--------> SOURCE . | . --- . /// . . .

There really isn't a need to isolate them. I just liked the fact that the optocoupler was a single IC chip as opposed to multiple transistors. I just thought it would be fast enough!

At any rate, I guess I will switch to no isolation with a design like Fred suggested.

I have a few more questions though, if anyone is still following...

This logic driving MOSFETs is for an H-bridge motor driver. There is a Motorola HCS12 microprocessor providing the logic PWM driving signal, and the MOSFETS are IRF1405 (large), digikey part IRF1405-nd.

The remainder of this h-bridge design is simple 4 of these MOSFETs set up in a typical h-bridge. Two drains are tied to 24V, their two sources are tied to the drains of the other two MOSFETs, whose sources are 24V ground (system ground for 5V, 12V, and 24V). The motor output is taken between the common source-drain connections of the MOSFETs. These MOSFETs do have built in recovery diodes.

The logic is continually driving all four MOSFETs. One of 3 scenarios is possible. The upper left and bottom right on (motor "forward") in this case the upper right and bottom left are off by driving zero pwm signal, the upper right and bottom left are on (motor "backward") in this case the upper left and bottom right are off by driving zero pwm signal, or all four MOSFETs are off by driving zero pwm signal. There is one PWM signal and one "direction" bit from the processor, which other hardware assists in creating the PWM inputs to each gate. The opposite corner gates are tied together (upper right and bottom left, and upper left and bottom right).

I have been testing this circuit using the original optocoupler with a

3k pulldown into the gates of the MOSFETs. The signal into the optocoupler is clean, the signal out (going into the gates) is more sine wave like than square, and is the part I will be cleaning up with Fred's suggestions, but even with a sine wave it will turn a small unloaded motor in each direction properly. Everything looked pretty good.

When I hooked the driver up with the same setup into a bigger motor, which had a small load on it, everytime I had the processor send the signals to turn the motor in one direction or another, the processor would reset, and the driver would not output the correct signal. I haven't had a chance (yet) to do further testing to find out why it is resetting, but I'm having some trouble coming up with initial guesses.

One problem that I did notice when looking at the gates of the MOSFETs when driving them, is that the MOSFETs that *should* be off (by driving zero PWM signal into the optocoupler diode) are seeing some noise (up to nearly 5V) at the 10kHz frequency that the opposite MOSFETs are being driven at. The gates of these "off" MOSFETs are connected to the collector of the optotransistor (which should not be conducting), and a

3k resistor to ground. This should mean they are grounded, yet they are seeing this noise. This made me think that for some reason something is going on with my ground, and this could potentially cause the processor to resetting. I did not see resetting on testing the small motor with no load, but on the larger motor, I did.

What could the problem be with my design? Unfortunately the 5V, 12V, and 24V commons cannot be isolated, and up to this point with many other components, there has not been any issues.

An additional problem with the h bridge design is that when the MOSFETs are suddenly turned off when the motor is on and moving a load, the motor's back EMF will need to be handled. I have no determined exactly what the effects of this voltage are in this design, but I will need to in the future. First thing is to get the processor to stop resetting.

Sorry for such a long post, and for asking some silly questions (or having silly problems, if they are), but I am pretty new to the EE scene and many "tricks of the trade" I have yet to learn :)

I just tested my h bridge again. Just as I suspected it appears that the ground is very noise. With the scope probe "grounded" at the 24V ground (right at the battery), and the probe at the ground closest to the processor I am seeing alot of noise, only when driving the motor. If the motor is disconnected, I do not get the noise.

If it is applicable, the noise signal is at about 8Hz, with like 13% of the pulse very rapidly going from ~5.5V to ~-4V, the rest of the pulse being ~0V. So basically 16ms of rapid 5.5V to 4V switching then 109ms of 0V (which it should be). The processor does not like it when this happens, of course, and resets.

I cannot figure out what is causing this!!

I did switch the pwm duty cycle from roughly 50% to 100% so it is no longer PWM, and I received similar results. The motor did, however, attempt to respond correctly although from the sound of the motor it was receiving a very noise signal still. This is the setup I used to measure the ground noise.

Any thoughts on why I am receiving such terrible ground noise? Everything looked like it would work so well on paper (and still does haha)!

I posted a schematic of the h bridge as it is now here:

I know there are probably many ways to do alot of what I am doing in the circuit, and my way may not be the most efficient or anything, but unless it is the cause of problems, I need to focus on what the real problems are!

The PROX stuff is for proximity sensors, normally closed. They are not tripping so assume them to be closed switches. All jumpers are in place. The reason the GND24 is jumped to GND was a quick fix to adjust trace widths. These grounds could have been connected directly. Same deal with the "current sensing" jumpers. I have tested the circuit with these current sensing jumpers removed also, which should theoretically remove any current limiting, and the results were the same.

Basically, with the current sensing/limiting I was hoping to amplify the voltage across the current sensing resistors R13 and R14 in order to input this into the comparator who's output turns the pwm signal on and off (rapidly under overcurrent condition). R16/R18 vary the limit. This was just something I thought of quick and probably is a stupid way to do it, but it worked in another similar design, so I kept it (at least the comparator part, I did not need to amplify anything in the previous design).

As you can see, it is not necessary to use the optocoupler, but it was easy to use a single IC for this, and I thought it would work. The schematic indicates PS2501-4, but in fact I am using the Sharp PC3Q67Q .

Also note that R1-R8 indicate 100k but are now 3k.

Hopefully the schematic is not too hard to follow.

Any thoughts on the ground issues I am having? I just can't get the idea out of my head that somehow the MOSFETs are to blame, like something with the gate sourcing some current to ground, or something??

Forgot to mention 10uF capacitors from CURR_SENSE_1_A to ground and from CURR_SENSE_2_A to ground and from COMPIN1 to ground and from COMPIN2 to ground. These helped clean up the current sensing. The voltage output of the op amp does indeed rise as the current does, and does trip the comparator which does turn the pwm off. The whole thing seems to work ok, just forgot to mention I added those caps on.

John, thanks for your quick reply!

I'm not sure how to quote your text so I'll just write what you wrote and respond under it...

amplifiers, comparators and TTL logic chips."

I'm not sure exactly what you mean by this?

Also, do you suspect that current sensing in this fashion is the cause of my ground noise problems?

When I was using a small motor (I guess the noise wasn't enough to reset the processor), I varied the current by varying the load, and the current sensing seemed to work the way I thought. I will try some of your suggestions to clean it up, but I only needed the current limit as a very crude way to protect the motor from drawing too much current.

I thought that by removing the jumper from CURR_SENSE_1_A to CURR_SENSE_1_B and from CURR_SENSE_2_A to CURR_SENSE_2_B I was virtually eliminating this part of the circuit from causing any problems. The only thing left after doing this was the 2milli-ohm current sense resistor in series with the motor, which shouldn't have a noticeable effect.

Again, the problem is only when a motor is connected. With no motor, everything *looks* ok. The "large" motor is about 316milli-ohms and like 80mH. I'm not sure the specs of the smaller motor. In both cases I suspect there is noise, but it only resets the processor with the larger motor.

Unless you meant that my ground noise issues are likely caused by the current sensing stuff (even with the jumpers removed), do you have any further ideas on what the problem could be?

John, thanks for your help.

I used bypass caps on all my other designs, but I never quite knew what they were or that they were so necessary, and that is half the reason I left them out on this h bridge. Something that still trips me out about them, is that capacitance in parallel adds, and the 5V supply has a bunch of 0.1uF caps all over the place for other chips on the processor board, and it also has some 10uF caps for some other chips. Does adding another 0.1uF for a new chip really make that much difference? It could be 0.1uF added to, say, 100uF or more in some cases, much less than 1% added capacitance. I guess the logical answer might be that it matters how close this bypass cap is to the new chip, but I wouldn't have thought that the trace resistance/capacitance/inductance/whichever it is that would effect this would be enough to cause problems.

At any rate, hopefully this solves my ground noise issue!

You might get some very useful suggestions on how to improve this circuit if you post a schematic to alt.binaries,schematics.electronic or to a web page and provide a url. Without seeing that schematic, my first question for you is what kind of bypass capacitor arrangement do you have directly across the power nodes of the H bridge?