I have implemented a slight variant on the circuit in this datasheet, Page 21, Figure 69:
The problem I am having is that as I lower the voltage at the node Rsense/R1 are connected to (lets called that Vreg), and increase the load current past a certain point, the output voltage Vout eventually maxes out and stays constant regardless of the load current (IL). This is because the voltage at the source is probably low enough that the MOSFET can't operate in saturation anymore.
To give some numbers... at about Vreg of 0.8V, I start having problems when Vsense (drop across Rsense) is 100mV. This would put the Voltage at Opamp Pin 2 at 0.7V, and the Vgs of the MOSFET is now very close to the threshold since the Opamp output is near zero. Increasing the current even further will not work since the opamp has no more room to move.
My question, is there any way I can get this to work for a Vreg of about 0.6V? I have seen some variants on this circuit with a JFET instead of a MOSFEt? Would that help? If I used a dual supply Opamp so the output can go negative, would taht help?
Thanks