Comparator as operational amplifier

You might want to put that on public share, or just post it on Imgur or something like that and avoid the huge pile that is Dropbox.

Tim

-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website:

So as always, I am looking for the last cent

I have a design where I need a pretty fast opamp, something that settles the output within 1 us

I have a free 25ns propagation delay comparator in the design, so I thought I could trick that comparator into changing gender to a opamp

So first attempt was this:

(please let me know if the link does not work, Dropbox has changed the way links can be shared)

How it works?:

The input is a step signal from 100mV to 200mV, which I would like to have amplified 15 times, hence the resistive divider

The output goes to an ADC, and before the ADC gets triggered, the switch U3 is closed. So the RC filter R4 and C3 oscillates around the output voltage of 3V. The RC ramp is set so the output will ramp up in about 300ns.

So now the capacitor is charged to about the correct voltage, but with a lot of ripple. Then, the switch is opened up, and the ripple is now low since the charge time is a lot longer (RC ramp is now R¤/R5 and C3), but that allows the output to settle to the correct value before the ADC is triggered

The circuit works, but I wonder if there is a better way to do it?

Regards

Klaus

the output within 1 us

ht I could trick that comparator into changing gender to a opamp

y links can be shared)

e amplified 15 times, hence the resistive divider

U3 is closed. So the RC filter R4 and C3 oscillates around the output volta ge of 3V. The RC ramp is set so the output will ramp up in about 300ns.

lot of ripple. Then, the switch is opened up, and the ripple is now low sin

that allows the output to settle to the correct value before the ADC is tri ggered

Note, there is a small error on the output. This error is caused by the fun ction of the circuit, namely that the output is a filtered version of the v oltage in the Out25 node. And the voltage in the Out25 node is not symmetri c, since the output voltage is charged from 5V and discharged to 0V.

That could be solved by symmetric current sources instead in both rails, bu t that is a cost added :-(

Cheers

Klaus

s the output within 1 us

ught I could trick that comparator into changing gender to a opamp

way links can be shared)

ave amplified 15 times, hence the resistive divider

h U3 is closed. So the RC filter R4 and C3 oscillates around the output vol tage of 3V. The RC ramp is set so the output will ramp up in about 300ns.

a lot of ripple. Then, the switch is opened up, and the ripple is now low s

t that allows the output to settle to the correct value before the ADC is t riggered

unction of the circuit, namely that the output is a filtered version of the voltage in the Out25 node. And the voltage in the Out25 node is not symmet ric, since the output voltage is charged from 5V and discharged to 0V.

but that is a cost added :-(

The error can be removed almost, by letting R6 sense on the output (Filt25)

Cheers

Klaus

I didn't know that one, just registred, thanks :-)

Link with Imgur:

Cheers

Klaus

the output within 1 us

ht I could trick that comparator into changing gender to a opamp

y links can be shared)

e amplified 15 times, hence the resistive divider

U3 is closed. So the RC filter R4 and C3 oscillates around the output volta ge of 3V. The RC ramp is set so the output will ramp up in about 300ns.

lot of ripple. Then, the switch is opened up, and the ripple is now low sin

that allows the output to settle to the correct value before the ADC is tri ggered

Could your comparator operate linearly? C in the nfb to give stability.

NT

s the output within 1 us

ught I could trick that comparator into changing gender to a opamp

way links can be shared)

ave amplified 15 times, hence the resistive divider

h U3 is closed. So the RC filter R4 and C3 oscillates around the output vol tage of 3V. The RC ramp is set so the output will ramp up in about 300ns.

a lot of ripple. Then, the switch is opened up, and the ripple is now low s

t that allows the output to settle to the correct value before the ADC is t riggered

Or the other way round, could one of your comparators be replaced by an opa mp, leaving you a spare opamp?

NT

s the output within 1 us

ught I could trick that comparator into changing gender to a opamp

way links can be shared)

ave amplified 15 times, hence the resistive divider

h U3 is closed. So the RC filter R4 and C3 oscillates around the output vol tage of 3V. The RC ramp is set so the output will ramp up in about 300ns.

a lot of ripple. Then, the switch is opened up, and the ripple is now low s

t that allows the output to settle to the correct value before the ADC is t riggered

I tried that, but it doesn't work right

Cheers

Klaus

les the output within 1 us

hought I could trick that comparator into changing gender to a opamp

e way links can be shared)

have amplified 15 times, hence the resistive divider

tch U3 is closed. So the RC filter R4 and C3 oscillates around the output v oltage of 3V. The RC ramp is set so the output will ramp up in about 300ns.

h a lot of ripple. Then, the switch is opened up, and the ripple is now low

but that allows the output to settle to the correct value before the ADC is triggered

pamp, leaving you a spare opamp?

That is not possible, sorry

s the output within 1 us

ught I could trick that comparator into changing gender to a opamp

way links can be shared)

ave amplified 15 times, hence the resistive divider

h U3 is closed. So the RC filter R4 and C3 oscillates around the output vol tage of 3V. The RC ramp is set so the output will ramp up in about 300ns.

a lot of ripple. Then, the switch is opened up, and the ripple is now low s

t that allows the output to settle to the correct value before the ADC is t riggered

Crap, I just found out I used a comparator for the simulation with internal hysteresis. I will replace and get back

Cheers

Klaus

NatSemi AN-74 showed how to compensate the LM339 comparator to amplify but those strategies may be too slow for your app also a series RC between the inputs may reduce input Z too much.

Your self osc PWM may be fast enough but cleaning the ripple quickly might need an op-amp :)

piglet

les the output within 1 us

hought I could trick that comparator into changing gender to a opamp

e way links can be shared)

have amplified 15 times, hence the resistive divider

tch U3 is closed. So the RC filter R4 and C3 oscillates around the output v oltage of 3V. The RC ramp is set so the output will ramp up in about 300ns.

h a lot of ripple. Then, the switch is opened up, and the ripple is now low

but that allows the output to settle to the correct value before the ADC is triggered

What you've posted seems to work, but if you need to add a transistor & con trol for it for the ripple filter, are you really much ahead on just using a 1 tr amplifier stage & no opamp/comparator?

NT

Doesn't work for me. Dropbox is busy commiting suicide.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics

ttles the output within 1 us

thought I could trick that comparator into changing gender to a opamp

the way links can be shared)

to have amplified 15 times, hence the resistive divider

witch U3 is closed. So the RC filter R4 and C3 oscillates around the output voltage of 3V. The RC ramp is set so the output will ramp up in about 300n s.

ith a lot of ripple. Then, the switch is opened up, and the ripple is now l

, but that allows the output to settle to the correct value before the ADC is triggered

y.

ontrol for it for the ripple filter, are you really much ahead on just usin g a 1 tr amplifier stage & no opamp/comparator?

I can add a PMOSFET for the switch, and control that from the microcontroll er. Just place a timer ahead of the DMA that triggers the ADC, so I have 50

0ns to do the trick

I am looking at the very last cent, and in this case I save 7 cents even th ough I have to place a MOSFET in there. My fellow peers at work will probab ly need some convincing, not all of them like to play to many tricks .-)

Cheers

Klaus

It basically consists of loading the output with "way too much" C, shifting the poles down (in frequency) low enough that they sneak back onto the left half-plane.

Or squashing them down so small that they're invisible at a glance (meanwhile the comparator continues singing away the few millivolts and millamperes it has).

I recall reading one of the LT "fast" comparators was stable in some way, but I can't find a reference.

In other words, how fast and quiet do you need it -- how desperate for an op-amp are you?

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com

s the output within 1 us

ught I could trick that comparator into changing gender to a opamp

way links can be shared)

ave amplified 15 times, hence the resistive divider

h U3 is closed. So the RC filter R4 and C3 oscillates around the output vol tage of 3V. The RC ramp is set so the output will ramp up in about 300ns.

a lot of ripple. Then, the switch is opened up, and the ripple is now low s

t that allows the output to settle to the correct value before the ADC is t riggered

Yes, the reason it did not work was since I had that opamp model with intri nsic hysteresis. Without it, the loop behaves, and the cap compensate metho d works now, and that's a better solution than triggering a MOSFET to chang e the RC constant

Yes. Correct. The ADC is a 12 bit one, so I need to have the ripple down in close to 1mV in order not to introduce to much error

Cheers

Klaus

Think it was the LT1016:

Headline suggests it's "stable" within the active output region (i.e., the inputs near zero offset, in the linear range), though with respect to supply current and/or PSRR, not output with respect to input. It's also claimed to have 50 GHz GBW.

Presumably, you wouldn't be able to use it at very low noise gain. :)

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com

s the output within 1 us

ught I could trick that comparator into changing gender to a opamp

way links can be shared)

ave amplified 15 times, hence the resistive divider

h U3 is closed. So the RC filter R4 and C3 oscillates around the output vol tage of 3V. The RC ramp is set so the output will ramp up in about 300ns.

a lot of ripple. Then, the switch is opened up, and the ripple is now low s

t that allows the output to settle to the correct value before the ADC is t riggered

The app note referenced translates to this circuit in my simulation, that c onverts a comparator to an opamp:

App note page 26:

But, doesn't the function of the feedback capacitor assume that the output of the comparator is in a linear mode with respect to the feedback?

Lets say the comparator is burried inside a microcontroller and the output of the comparator is inverted 2 times due to pin buffers on the microcontro ller, would the feedback trick still work when propagation delay effects co me into play?

Regards

Klaus

[snip]

Can't view, requires login.

Probably going to sing, but you might get lucky with the extra delays, if short enough, the effective pole locations will occur beyond the GBW. ...Jim Thompson

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             I'm looking for work... see my website. 

     Thinking outside the box... producing elegant solutions.

Here is it on another page, including 2x stages simulating a port (with 2N7002 and BSS84, way to slow, I know):

Cheers

Klaus