74HCT9046 VCO phase noise?

Hello:

I wonder what is the lowest phase noise that can be obtained from the

74HCT9046's VCO, running at f_0=16MHz. For instance, the relative VCO signal power at f_0+-100Hz, +-500Hz, +-1000Hz.

Thank you for you help.

Andy.

Reply to
Andy F Z
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Are you asking about the raw VCO performance, or the VCO in a locked loop?

Cheers, Tom

Reply to
Tom Bruhns

The raw performance. But if the data for a particular, well tuned locked loop is available - that would be useful as well.

Thanks,

Andy.

Reply to
Andy F Z

IIRC: If you consider the noise to be a voltage source at the control input, you can say that there is a 100nV/sqrt(Hz) wide band noise and a 500Hz 1/F corner. The values will vary quite a lot from maker to maker.

Assuming the control voltage location for the noise source, suggests that the noise is in terms of frequency noise and not phase noise. At some highish frequency, actual phase noise from within the VCO will start to show at the output.

Monitoring the output with a counter that samples at a 10Hz rate, I have seen variations under 10PPM in the frequency.

When you close the loop, the phase margin of the system matters a lot to the amount of noise you see. If you use the self bias in the the phase detector's input amplifier, you take a fairly major noise hit. You are better to use an external comparitor and feed the device with a sharp square wave. Doing this I have seen frequency noise levels under 1 part in a billion per sqrt(Hz). My measurement was done at about 2MHz.

Reply to
MooseFET

MooseFET wrote: ...

What point in the input control circuit do you mean? The ratio dVCO_Frequency/dVCO_IN of the 74HCT9046A depends on the R1C1 product. I have not come across other makers of this chip than NXP/Philips.

In my prototype, the output signal density is essentially spread in a few kiloHertz area around the center frequency, even with a very very overdamped control loop, I tend to conclude it's the noise within the VCO.

Thanks you for the information!

Reply to
Andy F Z

It is a variation on the 4046, 74HC4046. The exact part may not be made by many people but lots of things very like it are.

The signal on pin 9 is the control input to the VCO. This is where I referenced my noise measurement.

I find this result a little unexpected. What was the gain crossover frequency of you loop? Near the carrier, the VCO's output noise should not be what effects the resulting noise. The VCO's noise is within a servo loop. If you model the VCO's output as a voltage instead of a phase and think about your average op-amp circuit, I think you will see what I mean.

Reply to
MooseFET

MooseFET wrote: > ...

Oh, yes, I realise that the VCO part must be the same in the 74HCT9046.

In fact, I have a big N divider in the loop, the reference frequency is about 1 kHz, so the servo loop must not be able to reduce the noise in a few kHz vicinity of the carrier. I have now taken a look at the VCO's signal with the loop disconnected, its near carrier spectrum appears to be pretty the same as with the loop, and too bad for my purpose...

Thank you.

Reply to
Andy F Z

You're using a well-bypassed SMD part? Bypassed with both ceramic and low-esr electrolytics? The VCOs in the '4046 PLLs are excessively sensitive to high-frequency supply ringing (e.g., from two ceramic caps resonating with the supply-trace inductance, which I've been able to observe by careful scope observations), and the '9046 VCOs are no doubt much the same.

Reply to
Winfield

I still find it strange. Have you looked at the supply voltage with the scope? Maybe there is ripple on it.

Reply to
MooseFET

Bypassed by ceramic caps, and with an inductance in the power rail... I will try an electrolytics. In the meantime, I have tried a 1u film, but it has had no effect.

I will try this chip in an optimized testbed, the current layout does not have a solid ground plane, for instance.

Thank you.

Reply to
Andy F Z

No, no obvious ripple on the power rail. But it looks like this VCO is extremely sensitive to the supply voltage/rail (at least when pushed to the limits: at 15-16 MHz). I will try it in an optimized, "quiet" testbed, maybe with a local voltage regulator.

Reply to
Andy F Z

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