I've been trying to understand the theory behind the design of the Ultra-LD 200W Power Amp Mk2 in the Aug 2008 issue of Silicon Chip. The amp uses On Semiconductor's NJL3281D/NJL1302D ThermalTrak power transistors. These have integral diodes.
This is the full circuit:
Photo of amp module:
Bias circuit:
The article:
Transistor datasheet:
In the absence of an adjustment, how can you guarantee that the quiescent current settles at a level that is optimum for crossover distortion and power dissipation purposes? Wouldn't the actual bias current be highly dependent on the characteristics of Q10 and Q11? Would a standard Vbe multiplier arrangement where DQ12/DQ13 and DQ14/DQ15 were wired in parallel (with series resistors ?), and Q10/Q11 were at ambient temperature, be a better way to do this? Wouldn't that guarantee optimal thermal tracking, and wouldn't that allow the amp to be optimally biased?
BTW, the article states that the quiescent voltage across the 0.1 ohm emitter resistors is 70-100mV. I believe this should be 7-10mV.
- Franc Zabkar