Hi group
In order to keep traces as short as possible I would like to route the PHY's MII interface to the built in EMAC0 with as short traces as possible. Xilinx consequently recommends to use IOs which are close to the EMAC. However, I could not find documentation (I'm aparently overlooking it) close to which bank the EMAC is located..... So does anyone know and tell me? While we are at it, where's the PPC core?
This is for a Virtex 4 FX 12 btw.
TIA
Markus