Board testing in production

Bed of nails hooks up to important testing points on the PCB. All interface to the board is through extendable pogo-pins including power, communications and mostly voltage measurements.

It's usually semi-automated. We just delivered a system for a healthcare module, where the board is placed into the fixture. The corner holes slip onto pins and bottom is carved to fit components, so the PCB cannot be misplaced. The fixture has a lid and when closed and started, the vacuum is applied, and pins would extend from the bottom.

Entire board functionality is tested including communication, current draws during different modes, voltages. Not on this last one, but sometimes functionality is tested under different voltage levels especially on automotive modules.

You indicate extensive tests - that means extensive time. Say your test takes 1min and your tester works 24/7 - you are testing around 0.5mil a year. Consider tester maintenance and downtime and take 10-20% off that volume. Depending on testability, you may want to consider false rejects too. Generally yes, you should consider the yield.

If you will want to bump-up the production - your RF functionality is going to make it difficult to build a second test head or second tester. The factories ususally have areas designated for particular products and the testers may influence each other. You may synchronize the test heads and test everything in parallel only RF functionality one at a time. Or build a good shielded fixture.

Roman

sounds like quite an expensive setup (the test jig), I'm assuming while on the test jig a different firmware (for the board) than what will be used in production is used? Are there any 'low cost' methods to prototype a test jig before commiting to a a production quality one?

Roman's description is, I would say, atypical, especially for RF products. ICT fixtures (e.g. Zehntel) are very RF-noisy environments, I would NOT want to do any functional testing inside one.

Normally there are at least two test fixtures: in-circuit test and functional test. At the ICT phase, the boards are still panelized; an entire panel is tested at one time. Microcontrollers may not even be installed (if socketed) or programmed at this point. The test basically establishes a voltage map over all the test points, and compares it against a known-good profile. Standard design rule is to have an ICT testpoint on every net in the circuit. ICT cannot test some parts - crystals for example.

Boards are then depanelized and software is added. The device may then be assembled further - partially or completely installed in its housing, controls, light pipes, battery contacts, {...} may be added.

A functional test fixture will power up the UUT and perform some communication tests, the nature of which depends on the device of course.

Gearing up for mass production is relatively expensive. Building an ICT fixture and writing the program can be anywhere between $5K and $20K in my experience. The reason for doing this is that for _large- scale_ production, it is cheaper to buy the fixture and catch bad boards early than the alternative, which is to assume that the stuffing is good and catch/rework defectives at the functional test step.

Let me muddy the waters a bit more. Larwe describes ICT as being done on unpopulated boards, but this is not normally called ICT testing in my experience. This is called "bed of nails testing" (not that this is wholely different) which typically can be done with a much simpler piece of equipment since it is only tests for connectivity and shorts. ICT or "In Circuit Testing" was started a long time ago (back when dinosaurs roamed the earth) and chips were mostly SSI and MSI like TTL or ECL. The idea was that it was time consuming and expensive to design and perform 100% testing on a board from the I/O connectors. So instead you could devise a bed of nails test fixture which could drive nets that were internal to the board and force signals to a given state to observe the results from the chips using these signals as inputs. Since you could test a single chip at a time, you could design and run the tests much more quickly than by testing from the I/Os. The tester was and is very expensive however.

Now very little SSI and MSI are used on boards and much more testing is done by JTAG boundary scan or just plain SW running on the board doing functional testing. But there are still some apps that require a bed of nails fixture to drive various signals and observing the results. I don't call this ICT since typically a signal is not overdriven and the goal is not usually to isolate the chips in the circuit as was originally done. But what's in a name?

The point is that a bed of nails fixture is required, a test program must be written and an expensive tester must be used. Often this is pure overkill since the reliability of fabrication is often very high and most devices can be built with enough "smarts" to test themselves when programmed, or they can be designed so that JTAG boundary scan is adequate to fully test the board statically. But each design is different, so you can be the judge of what your product needs.

No! I said the micros may be missing [i.e. if socketed] or unprogrammed. Otherwise the board is fully stuffed. The purpose of ICT is to check that everything that was supposed to be stuffed is stuffed, and approximately correct values on some passive parts. It can also check certain polarized components for orientation.

ICT catches a lot of "wrong reel on the pick-n-place" errors.

Depends. We have had testers with using the same live firmware. Others have diagnostic mode or test firmware (i.e. these test only electrical portion of a product).

The bed of nails is probably not that expensive. Get the quotation from these guys, they seem to be very good, we have used them before:

If you want to make it yourself, the pins are from $1 and up, I just googled these guys, but search for yourself:

Google around and figure out how much you want to make yourself and how much you want to subcontract. The link I am posting here are just results from Google, I am not associated with any of them.

Roman