National Semiconductor LM317 datasheet

LM317 3-Pin Adjustable Regulator

1 Features

• Output voltage range:
  • Adjustable: 1.25V to 37V
• Output current: 1.5A
• Line regulation: 0.01%/V (typ)
• Load regulation: 0.1% (typ)
• Internal short-circuit current limiting
• Thermal overload protection
• Output safe-area compensation (new chip)
• PSRR: 80dB at 120Hz for CADJ = 10μF (new chip)
• Packages:
  • 4-pin, SOT-223 (DCY)
  • 3-pin, TO-263 (KTT)
  • 3-pin, TO-220 (KCS, KCT), legacy chip

2 Applications

• Multifunction printers
• AC drive power stage modules
• Electricity meters
• Servo drive control modules
• Merchant network and server PSU

*Needed if the device is more than 6 inches from filter capacitors.

†Optional, improves transient response.

††See Equation 1.

$$ V_{OUT} = 1.25V \times \left(1 + \frac{R_2}{R_1}\right) + I_{ADJ} \times (R_2) \quad (1) $$

Typical Application

3 Description

The LM317 is an adjustable three-pin, positive-voltage regulator capable of supplying more than 1.5A over an output voltage range of 1.25V to 37V. The device requires only two external resistors to set the output voltage. The device features a typical line regulation of 0.01% and typical load regulation of 0.1%. The LM317 includes current limiting, thermal overload protection, and safe operating area protection. Overload protection remains functional even if the ADJUST pin is disconnected.

Typically, no capacitors are needed unless the device is situated more than 6 inches from the input filter capacitors. In that case, an input bypass is needed. Add an optional output capacitor to improve transient response. Bypass the adjustment pin to achieve very high ripple rejection ratios that are difficult to achieve with standard 3-pin regulators.

Package Information

(1) For more information, see the Mechanical, Packaging, and Orderable Information.

(2) The package size (length × width) is a nominal value and includes pins, where applicable.

(3) Legacy chip.

Battery-Charger Circuit

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

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The regulator is floating and detects only the input-to-output differential voltage. Thus, supplies of several hundred volts are regulated as long as the maximum input-to-output differential is not exceeded. That is, avoid short-circuiting the output.

By connecting a fixed resistor between the adjustment pin and output, the LM317 is also able to be used as a precision current regulator. Supplies with electronic shutdown are achieved by clamping the adjustment terminal to ground, which programs the output to 1.25V where most loads draw little current.

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Table of Contents

• 1 Features ........ 1
• 2 Applications ........ 1
• 3 Description ........ 1
• 4 Device Comparison Table ........ 4
• 5 Pin Configuration and Functions ........ 5
• 6 Specifications ........ 6
•     6.1 Absolute Maximum Ratings ........ 6
•     6.2 ESD Ratings ........ 6
•     6.3 Recommended Operating Conditions ........ 6
•     6.4 Thermal Information (Legacy Chip) ........ 7
•     6.5 Thermal Information (New Chip) ........ 7
•     6.6 Electrical Characteristics ........ 8
•     6.7 Typical Characteristics ........ 9
• 7 Detailed Description ........ 13
•     7.1 Overview ........ 13
•     7.2 Functional Block Diagram ........ 13
•     7.3 Feature Description ........ 13
•     7.4 Device Functional Modes ........ 14
• 8 Application and Implementation ........ 15
•     8.1 Application Information ........ 15
•     8.2 Typical Application ........ 15
•     8.3 System Examples ........ 17
•     8.4 Power Supply Recommendations ........ 23
•     8.5 Layout ........ 23
• 9 Device and Documentation Support ........ 28
•     9.1 Device Support ........ 28
•     9.2 Receiving Notification of Documentation Updates ........ 28
•     9.3 Support Resources ........ 28
•     9.4 Trademarks ........ 28
•     9.5 Electrostatic Discharge Caution ........ 28
•     9.6 Glossary ........ 28
• 10 Revision History ........ 29
• 11 Mechanical, Packaging, and Orderable Information ........ 29

4 Device Comparison Table

5 Pin Configuration and Functions

Figure 5-1. DCY Package, 4-Pin SOT-223 (Top View)

Figure 5-2. KCS or KCT Package, 3-Pin TO-220 (Top View), Legacy Chip

Figure 5-3. KTT Package, 3-Pin TO-263 (Top View)

Pin Functions, Metal Can Packages

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) (2)

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.

6.2 ESD Ratings

(1) JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

6.4 Thermal Information (Legacy Chip)

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application note.

6.5 Thermal Information (New Chip)

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application note.

(2) When surface-mount packages are used (SOT-223), the junction to ambient thermal resistance is reduced by increasing the PCB copper area that is thermally connected to the package. See the Heat Sink Requirements section for heat sink techniques.

6.6 Electrical Characteristics

some specifications apply over the full operating temperature range as noted; unless otherwise specified, TJ = 25°C, VIN – VOUT = 5V, and IOUT = 10mA(1)

(1) For the legacy chip (unless otherwise noted), the following test conditions apply: |VI – VO| = 5V, IOMAX = 1.5A, and TJ = 0°C to 125°C. Pulse testing techniques are used to maintain the junction temperature as close to the ambient temperature as possible.

(2) For the legacy chip, line regulation is expressed as the percentage change in output voltage per 1V change at the input.

(3) For the legacy chip, maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA) / RθJA. Operating at the absolute maximum TJ of 150°C potentially affects reliability.

(4) For the legacy chip, CADJ is connected between the ADJUST pin and GND.

(5) For the new chip, regulation is measured at a constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage resulting from heating effects are covered under the specifications for thermal regulation.

6.7 Typical Characteristics

Figure 6-1. Load Regulation (Legacy Chip)

Figure 6-2. Load Regulation (Legacy Chip)

Figure 6-3. Load Regulation (New Chip)

Figure 6-4. Load Transient Response (Legacy Chip)

Figure 6-5. Load Transient Response (Legacy Chip)

Figure 6-6. Load Transient Response (New Chip)

LM317

6.7 Typical Characteristics (continued)

Figure 6-7. Line Regulation (Legacy Chip)

Figure 6-8. Output Voltage vs Input Voltage, VOUT = VREF (New Chip)

Figure 6-9. Output Voltage vs Input Voltage, VOUT = 5V (New Chip)

Figure 6-10. Ripple Rejection vs Output Current (Legacy Chip)

Figure 6-11. Ripple Rejection vs Output Voltage (Legacy Chip)

Figure 6-12. Ripple Rejection vs Frequency (Legacy Chip)

6.7 Typical Characteristics (continued)

Figure 6-13. Ripple Rejection vs Output Voltage (New Chip)

Figure 6-14. Ripple Rejection vs Frequency (New Chip)

Figure 6-15. Ripple Rejection vs Output Current (New Chip)

Figure 6-16. Current Limit Threshold (New Chip)

Figure 6-17. Adjustment Current vs Temperature (New Chip)

Figure 6-18. Dropout Voltage vs Temperature (New Chip)

LM317

6.7 Typical Characteristics (continued)

Figure 6-19. Temperature Stability (New Chip)

Figure 6-20. Minimum Operating Current (New Chip)

Figure 6-21. Output Impedance vs Frequency (New Chip)

Figure 6-22. Line Transient Response (New Chip)

7 Detailed Description

7.1 Overview

The LM317 is an adjustable three-pin, positive-voltage regulator capable of supplying up to 1.5A over an output voltage range of 1.25V to 37V. The device requires only two external resistors to set the output voltage. The device features a typical line regulation of 0.01% and typical load regulation of 0.1%. The LM317 includes current limiting, thermal overload protection, and safe operating area protection. Overload protection remains functional even if the ADJUST pin is disconnected.

The LM317 is designed to minimize the IADJUST current and make this current constant with line and load changes. A 100µA current from the ADJUST pin represents an error term.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 NPN Darlington Output Drive

The NPN Darlington output topology provides naturally low output impedance and an output capacitor is optional. A 3V headroom is recommended (VI – VO) to support maximum current and lowest temperature.

7.3.2 Overload Block

Overcurrent and overtemperature shutdown protects the device against overload or damage from operating in excessive heat.

7.3.3 Programmable Feedback

An op amp with a 1.25V offset input at the ADJUST pin provides easy output voltage or current programming (but not both). For current regulation applications, use a single resistor whose resistance value is 1.25V / IO and a power rating greater than (1.25V)² / R. For voltage regulation applications, two resistors set the output voltage.

LM317

Texas Instruments

7.4 Device Functional Modes

7.4.1 Normal Operation

The device OUTPUT pin sources current necessary to make the OUTPUT pin 1.25V greater than ADJUST pin to provide output regulation.

7.4.2 Operation With Low Input Voltage

The device requires up to 3V headroom (VI – VO) to operate in regulation. The device potentially drops out and OUTPUT voltage becomes the INPUT voltage minus the dropout voltage with less headroom.

7.4.3 Operation at Light Loads

The device passes the bias current to the OUTPUT pin. Make sure the load or feedback consumes this minimum current for regulation or the output is potentially too high. See the Electrical Characteristics table for the minimum load current needed to maintain regulation.

7.4.4 Operation In Self Protection

When an overload occurs, the device shuts down the Darlington NPN output stage or reduces the output current to prevent device damage. The device automatically resets from the overload. The output is either reduced or alternates between on and off until the overload is removed.

8 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

8.1 Application Information

The flexibility of the LM317 allows the device to be configured to take on many different functions in DC power applications.

8.2 Typical Application

Figure 8-1. Adjustable Voltage Regulator

8.2.1 Design Requirements

• R1 and R2 are required to set the output voltage.
• Use $C_{ADJ}$ to improve ripple rejection. $C_{ADJ}$ prevents amplification of the ripple when the output voltage is adjusted higher. The impact of $C_{ADJ}$ on the ripple rejection performance is captured in the Electrical Characteristics table.
• $C_i$ is recommended, particularly if the regulator is not in close proximity to the power-supply filter capacitors. A 0.1µF or 1µF ceramic or tantalum capacitor provides sufficient bypassing for most applications, especially when adjustment and output capacitors are used.
• $C_O$ improves transient response, but is not needed for stability.
• Protection diode D2 is recommended if $C_{ADJ}$ is used. The diode provides a low-impedance discharge path to prevent the capacitor from discharging into the output of the regulator.
• Protection diode D1 is recommended if $C_O$ is used. The diode provides a low-impedance discharge path to prevent the capacitor from discharging into the output of the regulator.

LM317

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8.2.2 Detailed Design Procedure

$V_O$ is calculated as shown in Equation 2. $I_{ADJ}$ is typically 50\muA and negligible in most applications.

$V_O = V_REF (1 + R2 / R1) + (I_ADJ × R2) \quad (2)$

8.2.3 Application Curves

Figure 8-2. Line-Transient Response (Legacy Chip)

Figure 8-3. Line-Transient Response (Legacy Chip)

Figure 8-4. Line-Transient Response (New Chip)

Figure 8-5. Load Transient Response (New Chip)

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SLVS044Z–SEPTEMBER 1997–REVISED APRIL 2025

8.3 System Examples

8.3.1 0V to 30V Regulator Circuit

Here, the voltage is determined by:

$V_OUT = V_REF \left(1 + R_2 + R_3/R_1\right) - 10V$ (3)

By varying the voltage at the terminal of R3 (−10V in Figure 8-6), $V_{OUT}$ is varied from 0V to 30V. In the absence of −10V, the $V_{OUT}$ is only regulated to the lowest value of $V_{REF}$ by making $R_2$ = 0Ω.

Figure 8-6. 0V to 30V Regulator Circuit

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8.3.2 Adjustable Regulator Circuit With Improved Ripple Rejection

As shown in Figure 8-7, C2 helps stabilize the voltage at the ADJUST pin, which helps reject noise. Diode D1 exists to discharge C2 in case the output is shorted to ground.

Figure 8-7. Adjustable Regulator Circuit with Improved Ripple Rejection

8.3.3 Precision Current-Limiter Circuit

This application limits the output current to $I_{LIMIT}$ in Figure 8-8.

Figure 8-8. Precision Current-Limiter Circuit

8.3.4 Tracking Preregulator Circuit

This application keeps a constant voltage across the second LM317 in the circuit of Figure 8-9.

Figure 8-9. Tracking Preregulator Circuit

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SLVS044Z–SEPTEMBER 1997–REVISED APRIL 2025

8.3.5 1.25V to 20V Regulator Circuit With Minimum Program Current

Because the value of $V_{REF}$ is constant, the value of $R_1$ determines the amount of current that flows through $R_1$ and $R_2$. The size of R2 determines the IR drop from ADJUSTMENT to GND. Higher values of R2 translate to higher $V_{OUT}$. Equation 4, Equation 5, and Figure 8-10 illustrate this relationship.

$V_OUT = V_REF\left(1 + R_2/R_1\right) \quad (4)$

$(R_1 + R_2)_min = V_ol_reg(min) \quad (5)$

Figure 8-10. 1.25V to 20V Regulator Circuit With Minimum Program Current

8.3.6 Battery-Charger Circuit

The series resistor limits the current output of the LM317, minimizing damage to the battery cell.

$V_OUT = 1.25 V × \left(1 + R2/R1\right) \quad (6)$

$I_OUT(short) = \frac1.25VRS \quad (7)$

$Output Impedance = RS × \left(1 + R2/R1\right) \quad (8)$

Figure 8-11. Battery-Charger Circuit

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8.3.7 50mA, Constant-Current, Battery-Charger Circuit

Use the current-limit operation mode to trickle charge a battery at a fixed current. ICHG = 1.25V ÷ 24Ω. Make sure VI is greater than VBAT + 4.25V. (1.25V [VREF] + 3V [headroom]). Figure 8-12 shows a diagram of a battery-charger circuit.

Figure 8-12. 50mA, Constant-Current, Battery-Charger Circuit

8.3.8 Slow Turn-On 15V Regulator Circuit

The capacitor C1, in combination with the PNP transistor, helps the circuit (Figure 8-13) to slowly start supplying voltage. In the beginning, the capacitor is not charged. Therefore, the output voltage starts at VC1 + VBE + 1.25V = 0V + 0.65V + 1.25V = 1.9V. When the capacitor voltage rises, VOUT rises at the same rate. When the output voltage reaches the value determined by R1 and R2, the PNP is turned off.

Figure 8-13. Slow Turn-On 15V Regulator Circuit

8.3.9 AC Voltage-Regulator Circuit

Figure 8-14 shows a circuit employing two LM317 devices. These two LM317 devices regulate both the positive and negative swings of a sinusoidal AC input.

Figure 8-14. AC Voltage-Regulator Circuit

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8.3.10 Current-Limited 6V Charger Circuit

When charge current increases, the voltage at the bottom resistor increases until the NPN starts sinking current from the ADJUST pin. The voltage at the ADJUST pin drops, and consequently the output voltage decreases until the NPN stops conducting. Figure 8-15 shows the current-limited circuit.

Figure 8-15. Current-Limited 6V Charger Circuit

8.3.11 Adjustable 4A Regulator Circuit

This application keeps the output current at 4A while having the ability to adjust the output voltage using the adjustable (1.5kΩ in Figure 8-16) resistor.

Figure 8-16. Adjustable 4A Regulator Circuit

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8.3.12 High-Current Adjustable Regulator Circuit

The PNP (2N2905) and NPN (2N6486) at the top of Figure 8-17 allow higher currents at VOUT than the LM317 provides. Meanwhile, the output voltage remains at levels determined by the ADJUST pin resistor divider of the LM317.

Figure 8-17. High-Current Adjustable Regulator Circuit

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8.4 Power Supply Recommendations

The LM317 is designed to operate from an input voltage supply range between 1.25V to 37V greater than the output voltage. If the device is more than six inches from the input filter capacitors, use an input bypass capacitor of any type for stability. Make sure this capacitor is 0.1µF or greater.

8.5 Layout

8.5.1 Layout Guidelines

• Bypass the input pin to ground with a bypass capacitor.
• The optimum placement is closest to the input pin of the device and the system GND. Take care to minimize the loop area formed by the bypass-capacitor connection, the input pin, and the system GND.
• For operation at full rated load, use wide trace lengths to eliminate I × R drop and heat dissipation.

8.5.1.1 Thermal Considerations

8.5.1.1.1 Heat Sink Requirements

The LM317 (new chip) regulators have internal thermal shutdown to protect the device from overheating. Under all operating conditions, make sure the device junction temperature does not exceed the rated maximum junction temperature ($T_J$) of 125°C for the LM317 (new chip). A heat sink is required depending on the maximum device power dissipation and the maximum ambient temperature of the application. To determine if a heat sink is needed, Equation 9 calculates the power dissipated by the regulator, $P_D$.

$P_D = ((V_IN - V_OUT) × I_L) + (V_IN × I_G) \quad (9)$

Figure 8-18 shows the voltage and currents that are present in the circuit.

Equation 10 calculates the next parameter, which is the maximum allowable temperature rise, $T_{R(MAX)}$.

$T_R(MAX) = T_J(MAX) - T_A(MAX) \quad (10)$

where:

• $T_{J(MAX)}$ is the maximum allowable junction temperature (125°C for the LM317, new chip)
• $T_{A(MAX)}$ is the maximum ambient temperature encountered in the application

Using the calculated values for $T_{R(MAX)}$ and $P_D$, Equation 11 calculates the maximum allowable value for the junction-to-ambient thermal resistance (R_\theta JA).

$R_\theta JA = (T_R(MAX) / P_D) \quad (11)$

Figure 8-18. Power Dissipation Diagram

If the calculated maximum allowable thermal resistance is higher than the actual package rating, then no additional work is needed. If the calculated maximum allowable thermal resistance is lower than the actual package rating, correct this issue. Either reduce $P_D$ or $T_{A(MAX)}$, or lower R_\theta JA by adding a heat sink, or some combination thereof. $P_D$ is the device power dissipation, $T_{A(MAX)}$ is the maximum ambient temperature, and R_\theta JA is the device thermal resistance.

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Equation 12 calculates the value if a heat sink is needed.

θHA ≤ (RθJA – (θCH + RθJC)) (12)

where:

• θCH is the thermal resistance of the contact area between the device case and the heat sink surface
• RθJC is thermal resistance from the junction of the die to the surface of the package case

When a value for θHA is calculated, select a heat sink with a value that is less than, or equal to, this number.

The θHA rating is specified numerically by the heat sink manufacturer in the catalog, or given in a curve plotting temperature rise versus power dissipation for the heat sink.

8.5.1.1.2 Heat Sinking Surface-Mount Packages

The TO-263 (KTT), SOT-223 (DCY), and TO-220 (KCS, KCT) packages use a copper plane on the PCB and the PCB as a heat sink. To optimize the heat sinking ability of the plane and PCB, solder the tab of the package to the plane.

8.5.1.1.2.1 Heatsinking the SOT-223 (DCY) Package

Figure 8-19 and Figure 8-20 show information for the SOT-223 package. Figure 8-20 assumes a RθJA of 74°C/W for 1oz. copper and 59.6°C/W for 2oz. copper (further details are in Section 6.5) and a maximum junction temperature of 125°C. See the AN-1028 Maximum Power Enhancement Techniques for Power Packages application note for thermal enhancement techniques to be used with the SOT-223 and TO-252 packages.

Figure 8-19. RθJA vs Copper (2oz.) Area for the SOT-223 Package

Figure 8-20. Maximum Power Dissipation vs TAMB for the SOT-223 Package

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LM317

SLVS044Z–SEPTEMBER 1997–REVISED APRIL 2025

8.5.1.1.2.2 Heat Sinking the TO-263 (KTT) Package

Figure 8-21 shows the TO-263 measured values of RθJA for different copper area sizes using a typical PCB with 1oz. copper. This figure also shows no solder mask over the copper area used for heat sinking.

As shown in Figure 8-21, increasing the copper area beyond 1 square inch produces very little improvement. The minimum value of RθJA for the TO-263 package mounted to a PCB is 32°C/W.

Figure 8-21. RθJA vs Copper (1-oz.) Area for the TO-263 Package

As a design aid, Figure 8-22 shows the maximum allowable power dissipation compared to ambient temperature for the TO-263 device. This figure assumes RθJA is 35°C/W and the maximum junction temperature is 125°C.

Figure 8-22. Maximum Power Dissipation vs TAMB for the TO-263 Package

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8.5.2 Layout Examples

Figure 8-23. Layout Example (Legacy Chip)

Figure 8-24. SOT-223 Layout Example (New Chip)

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Figure 8-25. TO-220 Layout Example (New Chip)

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9 Device and Documentation Support

9.1 Device Support

9.1.1 Device Nomenclature

Device Nomenclature

(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com.

9.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

9.3 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

9.4 Trademarks

TI E2E™ is a trademark of Texas Instruments.

All trademarks are the property of their respective owners.

9.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

9.6 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

10 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision Y (April 2020) to Revision Z (April 2025)

Changes from Revision X (September 2016) to Revision Y (April 2020)

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM

www.ti.com 24-Mar-2026

PACKAGING INFORMATION

(1) Status: For more details on status, see our product life cycle.

Addendum-Page 1

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PACKAGE OPTION ADDENDUM 24-Mar-2026

(2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind.

(3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition.

(4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width.

(5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board.

(6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part.

Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

22-Sep-2026

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

*All dimensions are nominal

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

22-Sep-2026

TAPE AND REEL BOX DIMENSIONS

*All dimensions are nominal

Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION

22-Sep-2026

TUBE

*All dimensions are nominal

Pack Materials-Page 3

PACKAGE OUTLINE

DCY0004A

SOT-223 - 1.8 mm max height

PLASTIC SMALL OUTLINE

7.3 6.7

PIN 1 INDEX AREA

1

2.3

4.6

3X 0.84 0.66

⊕ 0.1 M C A B

3

6.7 6.3

3.1 2.9

4

3.7 3.3

A B

C

⌒ 0.08 C

1.8 MAX

0.10 0.02

(1.6)

0.25 GAGE PLANE

10° 0°

0.75 MIN

0.35 0.23

4214843/C 05/2026

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC TO-261.

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EXAMPLE BOARD LAYOUT

DCY0004A SOT-223 - 1.8 mm max height PLASTIC SMALL OUTLINE

LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:6X

SOLDER MASK DETAILS

4214843/C 05/2026

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

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EXAMPLE STENCIL DESIGN

DCY0004A SOT-223 - 1.8 mm max height PLASTIC SMALL OUTLINE

PKG (3.48) (2.32) 3X (2.15) 1 3X (0.95) EXPOSED METAL TYP 4X (0.805) SYMM 4 4X (1.41) (2.3) 3 4X (0.96) (R0.05) TYP (2.9)

SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:8X

4214843/C 05/2026

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KCS0003B

PACKAGE OUTLINE

TO-220 - 19.65 mm max height

TO-220

4222214/B 08/2018

NOTES:

1. Dimensions are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-220.

TEXAS INSTRUMENTS

EXAMPLE BOARD LAYOUT

KCS0003B TO-220 - 19.65 mm max height TO-220

0.07 MAX ALL AROUND

□(1.7)

R (0.05)

SOLDER MASK— OPENING

3X Ø (1.2)

1

(2.54)

2

2X Ø (1.7) METAL

3

(5.08)

2X SOLDER MASK OPENING

0.07 MAX ALL AROUND

LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE:15X

4222214/B 08/2018

TEXAS INSTRUMENTS

MECHANICAL DATA

KTT (R-PSFM-G3) PLASTIC FLANGE-MOUNT PACKAGE

4200577-3/G 01/13

NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion not to exceed 0,005 (0,13) per side. Falls within JEDEC TO-263 variation AA, except minimum lead thickness and minimum exposed pad length.

LAND PATTERN DATA

KTT (R-PSFM-G3) PLASTIC FLANGE-MOUNT PACKAGE

4208208–2/C 08/12

NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Publication IPC-SM-782 is recommended for alternate designs. D. Laser cutting apertures with trapezoidal walls and also rounding corners will offer better paste release. Customers should contact their board assembly site for stencil design recommendations. Refer to IPC-7525. E. Customers should contact their board fabrication site for solder mask tolerances between and around signal pads. F. This package is designed to be soldered to a thermal pad on the board. Refer to the Product Datasheet for specific thermal information, via requirements, and recommended thermal pad size. For thermal pad sizes larger than shown a solder mask defined pad is recommended in order to maintain the solderable pad geometry while increasing copper area.

PACKAGE OUTLINE

KTT0003B

TO-263 - 4.83 mm max height

TRANSISTOR OUTLINE

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Features may not exist and shape may vary per different assembly sites.
4. Reference JEDEC registration TO-263, except minimum lead thickness and minimum exposed pad length.

TEXAS INSTRUMENTS

EXAMPLE BOARD LAYOUT

KTT0003B TO-263 - 4.83 mm max height TRANSISTOR OUTLINE

LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:5X

SOLDER MASK DETAILS

4215105/C 08/2024

NOTES: (continued)

5. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers SLMA002(www.ti.com/lit/slm002) and SLMA004 (www.ti.com/lit/slma004).
6. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented.

EXAMPLE STENCIL DESIGN

KTT0003B TO-263 - 4.83 mm max height TRANSISTOR OUTLINE

(1.29) TYP (0.91) 32X (□ 1.09) (1.29) 3X (1.07) 1 3X (2.16) (1.29) TYP (2.54) (4.515) SYMM 4 EXPOSED METAL TYP 3 (R0.05) TYP 14.17

SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 60% PRINTED SOLDER COVERAGE BY AREA SCALE:6X

4215105/C 08/2024

NOTES: (continued)

7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations.
8. Board assembly site may have different recommendations for stencil design.

TEXAS INSTRUMENTS

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